GS2971A Datasheet, PDF (100/152 Pages) Gennum Corporation – Integrated audio clock generator

Table 4-27:Video Core Configuration and Status Registers (Continued)
Address Register Name Bit Name
000h
IOPROC_1
ANC_CHECKSUM
_INSERTION_DS1_MASK
CRC_INS_DS1_MASK
LNUM_INS_DS1_MASK
TRS_INS_DS1_MASK
001h
IOPROC_2
RSVD
NONINV
DISB_AUTDET
TRS_WORD_REMAP_DS2
_DISABLE
RSVD
REGEN_352M_MASK
Bit Description
3
Disables insertion of ancillary data
checksums for 3G Level B Data
Stream 1, 3G Level A, HD and SD
inputs.
2
Disables insertion of HD/3G CRC
words for 3G Level B Data Stream
1, 3G Level A, and HD inputs.
1
Disables insertion of line numbers
for 3G Level B Data Stream 1, 3G
Level A, and HD inputs.
0
Disables insertion of TRS words for
3G Level B Data Stream 1, 3G Level
A, HD and SD inputs.
15 Reserved.
14 With DISB_AUTDET set HIGH, if this
bit is asserted (HIGH), forces
non-inverted MPEG-2 decoding. If
de-asserted (LOW), forces inverted
MPEG-2 decoding. Applicable in
DVB-ASI mode only.
13 Disables auto detection of inverted
DVB ASI MPEG-2 data when HIGH.
When LOW, NONINV is ignored
and the DVB decoder auto detects
for inverted MPEG-2 data.
Applicable in DVB-ASI mode only.
12 Disables 8-bit TRS word remapping
in Data Stream 2 (3G Level B only).
11 Reserved.
10 Disables regeneration of the
SMPTE 352M packet for 3G Level B
data. Note: this bit needs to be
enabled via the host interface to
disable SMPTE 352M packet
generation. It is strongly
recommended to set this bit LOW
only when Level B to Level A
conversion is enabled.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
N/A
0
0
0
0
0
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
100 of 152