GS2971A Datasheet, PDF (106/152 Pages) Gennum Corporation – Integrated audio clock generator

Table 4-27:Video Core Configuration and Status Registers (Continued)
Address Register Name Bit Name
008h
IO_CONFIG
RSVD
STAT2_CONFIG
009h
STAT1_CONFIG
STAT0_CONFIG
IO_CONFIG2
RSVD
STAT5_CONFIG
STAT4_CONFIG
STAT3_CONFIG
Bit Description
15
14-10
9-5
4-0
15
14-10
9-5
4-0
Reserved.
Configure STAT2 output pin:
00000: H Blanking when TIM_861 =
0; HSYNC when TIM_861 = 1
00001: V Blanking when TIM_861 =
0; VSYNC when TIM_861 = 1
00010: F bit when TIM_861 = 0;
Data Enable (DE) when TIM_861 =
1
00011: LOCKED
00100: Y/1ANC: ANC indication
(SD), Luma ANC indication (HD),
Data Stream 1 ANC data indication
(3G)
00101: C/2ANC: Chroma ANC
indication (HD) or Data Stream 2
ANC data indication (3G)
00110: Data Error
00111: Video Error
01000: Audio Error
01001: EDH Detected
01010: Carrier Detect
01011: RATE_DET0
01100: RATE_DET1
01101 - 11111: Reserved
Configure STAT1 output pin. (Refer
to above for decoding)
Configure STAT0 output pin. (Refer
to above for decoding)
Reserved.
Configure STAT5 output pin. (Refer
to above for decoding)
Configure STAT4 output pin. (Refer
to above for decoding)
Configure STAT3 output pin. (Refer
to above for decoding)
R/W
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
2
1
0
0
6
4
3
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
106 of 152