GS2971A Datasheet, PDF (35/152 Pages) Gennum Corporation – Integrated audio clock generator

Table 4-3:Input Clock Requirements (Continued)
Parameter
Min
Typ
Max
UOM
Notes
XTAL1 to XOUT Prop. Delay
1.3
1.6
2.3
ns
3
(Low to High)
NOTES:
Valid when the cell is used to buffer an external clock source which is connected to the XTAL1 pin, then nothing should be
connected to the XTAL2 pin.
4.7 Lock Detect
The LOCKED output signal is available by default on the STAT3 output pin, but may be
programmed to be output through any one of the six programmable multi-functional
pins of the device; STAT[5:0].
The LOCKED output signal is set HIGH by the Lock Detect block under the following
conditions:
Table 4-4:Lock Detect Conditions
Mode of Operation
Data-Through Mode
SMPTE Mode
SMPTE Mode with Lock
Noise-Immunity
Enabled
DVB_ASI Mode
Mode Setting
Condition for Locked
SMPTE_BYPASS = LOW
DVB_ASI = LOW
SMPTE_BYPASS = HIGH
DVB_ASI = LOW
SMPTE_BYPASS = HIGH
DVB_ASI = LOW
Bit 0x085[10] set to 1
AUTO/MAN = HIGH
SMPTE_BYPASS = LOW
DVB_ASI = HIGH
Bit AUTO/MAN = LOW
Reclocker PLL is locked.
Reclocker PLL is locked. Two
consecutive TRS words are detected in
a two-line window.
Reclocker PLL is locked. Two
consecutive TRS words are detected in
a two-line window. The last two
detected TRS words must have the
same alignment.
NOTE: Auto mode only. Not
supported in Manual mode.
Reclocker PLL is locked. 32 consecutive
DVB_ASI words with no errors are
detected within a 128-word window.
NOTE 1: The GS2971A will lock to ASI in auto mode, but could falsely unlock for some
ASI input patterns.
NOTE 2: In Standby mode, the reclocker PLL unlocks. However, the LOCKED signal
retains whatever state it previously held. So, if before Standby assertion, the LOCKED
signal is HIGH, then during standby, it remains HIGH regardless of the status of the PLL.
4.7.1 Asynchronous Lock
The lock detection algorithm is a continuous process, beginning at device power-up or
after a system reset. It continues until the device is powered down or held in reset.
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
35 of 152