GS2971A Datasheet, PDF (135/152 Pages) Gennum Corporation – Integrated audio clock generator

Table 4-29:HD and 3G Audio Core Configuration and Status Registers (Continued)
Address
221h
Register Name Bit Name
RATEA
RSVD
RATEA
ASXA
222h
223h
ACTA
PRIM_AUD
_DELAY_1
RSVD
ACTA
RSVD
DEL1_2A_1
EBIT1_2A
224h
PRIM_AUD
_DELAY_2
RSVD
DEL1_2A_2
225h
PRIM_AUD
_DELAY_3
RSVD
DEL1_2A_3
226h
PRIM_AUD
_DELAY_4
RSVD
DEL3_4A_4
EBIT3_4A
227h
PRIM_AUD
_DELAY_5
RSVD
DEL3_4A_5
228h
PRIM_AUD
_DELAY_6
RSVD
DEL3_4A_6
229h -
22Fh
230h
RSVD
AFNB
RSVD
RSVD
AFNB
231h
RATEB
RSVD
RATEB
ASXB
Bit
15-4
3-1
0
15-4
3-0
15-9
8-1
0
15-9
8-0
15-9
8-0
15-9
8-1
0
15-9
8-0
15-9
8-0
−
Description
Reserved.
Primary group sampling frequency
for channels 1 and 2.
Primary group asynchronous mode
for channels 1 and 2.
Reserved.
Primary group active channels.
Reserved.
Primary Audio group delay data for
channels 1 and 2 [7:0].
Primary Audio group delay data
valid flag for channels 1 and 2.
Reserved.
Primary Audio group delay data for
channels 1 and 2 [16:8].
Reserved.
Primary Audio group delay data for
channels 1 and 2 [25:17].
Reserved.
Primary Audio group delay data for
channels 3 and 4 [7:0].
Primary Audio group delay data
valid flag for channels 3 and 4.
Reserved.
Primary Audio group delay data for
channels 3 and 4 [16:8].
Reserved.
Primary Audio group delay data for
channels 3 and 4 [25:17].
Reserved.
15-9
8-0
15-4
3-1
0
Reserved.
Secondary group audio frame
number.
Reserved.
Secondary group sampling
frequency for channels 1 and 2.
Secondary group asynchronous
mode for channels 1 and 2.
R/W
R/W
R
R
R/W
R
R/W
R
R
R/W
R
R/W
R
R/W
R
R
R/W
R
R/W
R
R/W
R/W
R
R/W
R
R
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
135 of 152