GS2971A Datasheet, PDF (80/152 Pages) Gennum Corporation – Integrated audio clock generator

The default setting of both the HD_ANC_C2 and HD_ANC_Y1_C2 is LOW. The setting of
these bits is ignored when the device is configured for SD video standards.
Ancillary data packet extraction and deletion is disabled when the IOPROC_EN/DIS pin
is set LOW.
After extraction, the ancillary data may be deleted from the video stream by setting the
ANC_DATA_DEL bit of the host interface HIGH. When set HIGH, all existing ancillary
data is removed and replaced with blanking values. If any of the ANC_TYPE registers are
programmed with a DID and/or DID and SDID, only the ancillary data packets with the
matching IDs are deleted from the video stream.
NOTE 1: After the ancillary data determined by the ANC_TYPE_X_APX registers has
been deleted, other existing ancillary data may not be contiguous. The device does not
concatenate the remaining ancillary data.
NOTE 2: Reading extracted ancillary data from the host interface must be performed
while there is a valid video signal present at the serial input and the device is locked
(LOCKED signal is HIGH).
4.18.9 Level B to Level A Conversion
When IOPROC_2 register bit LEVEL_B2A_CONV_DISABLE_MASK is HIGH (default),
the GS2971A does not convert 3G LEVEL B streams between Level A and Level B
mapping formats.
When LEVEL_B2A_CONV_DISABLE_MASK is LOW, the GS2971A converts a 3G 1080p
Level B stream to the Level A mapping format, as per SMPTE 425M.
The device assumes that Link A and Link B are phase-aligned at the transmitter.
The output data are line multiplexed such that the data content from Link A and Link B
are assembled in a continuous fashion, at twice the input data rate. Extracted timing
reference information is used to trigger a line counter which embeds the correct line
number according to SMPTE 425M.
The Level B/A conversion acts only on the active picture, ANC data can become corrupt
outside of this region. In order to ensure that the embedded ANC data remains valid, we
recommend extracting the ANC data with the receiver prior to the Level B/A conversion
taking place.
NOTE 1: If Level B/A conversion is enabled, previous 352M Payload ID packets are not
deleted from the data stream.
NOTE 2: When Level B/A conversion is enabled, timing reference information (FVH)
present on the STAT outputs is not phase-aligned with the output video data, and should
not be used for line or frame synchronization activities. Being that CEA 861 timing is
derived from (FVH) timing reference information, it too should not be used. During Level
B to Level A conversion, it is advised that the user generates the H and V timing signals
from the embedded TRS words.
NOTE 3: If the GS2971A sees a synchronous switch where the difference in phases
between two Level B inputs is greater than ~10.7μs, the user may observe a missing H
pulse on the line following the switch line, when Level B/A conversion is enabled.
NOTE 4: Discontinuities in the line of video at the input of the Level B to A converter can
cause erroneous mapping to the Level A format. Therefore, when enabling B to A
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
80 of 152