GS2971A Datasheet, PDF (132/152 Pages) Gennum Corporation – Integrated audio clock generator

Table 4-29:HD and 3G Audio Core Configuration and Status Registers (Continued)
Address
207h
Register Name Bit Name
HD_AUDIO_ERR
OR_MASK
RSVD
EN_MISSING_PHASE
EN_ACS_DET3_4B
EN_ACS_DET1_2B
EN_ACS_DET3_4A
EN_ACS_DET1_2A
EN_CTRB_DET
EN_CTRA_DET
EN_DBNB_ERR
EN_DBNA_ERR
EN_ECCB_ERR
EN_ECCA_ERR
EN_ADPG4_DET
EN_ADPG3_DET
EN_ADPG2_DET
EN_ADPG1_DET
Bit Description
R/W Default
15 Reserved.
R/W
0
14 Asserts AUDIO_ERROR when
R/W
0
chosen group's phase data (Reg 9
bit 2) is missing
13 Asserts AUDIO_ERROR when
R/W
0
ACS_DET3_4B flag (Reg 201 bit 3) is
set.
12 Asserts AUDIO_ERROR when
R/W
0
ACS_DET1_2B (Reg 201 bit 2) flag is
set.
11 Asserts AUDIO_ERROR when
R/W
0
ACS_DET3_4A (Reg 201 bit 1) flag is
set.
10 Asserts AUDIO_ERROR when
R/W
0
ACS_DET1_2A (Reg 201 bit 0) flag is
set.
9
Asserts AUDIO_ERROR when
R/W
0
CTRB_DET (Reg 201 bit 5) flag is set.
8
Asserts AUDIO_ERROR when
R/W
0
CTRA_DET (Reg 201 bit 4) flag is
set.
7
Asserts AUDIO_ERROR when
R/W
0
DBNB_ERR (Reg 201 bit 7) flag is
set.
6
Asserts AUDIO_ERROR when
R/W
0
DBNA_ERR (Reg 201 bit 6 flag is set.
5
Asserts AUDIO_ERROR when
R/W
0
ECCB_ERR (Reg 203 bit 0) flag is set.
4
Asserts AUDIO_ERROR when
R/W
0
ECCA_ERR (Reg 203 bit 1) flag is
set.
3
Asserts AUDIO_ERROR when
R/W
0
ADPG4_DET (Reg 202 bit 4) flag is
set.
2
Asserts AUDIO_ERROR when
R/W
0
ADPG3_DET (Reg 202 bit 3) flag is
set.
1
Asserts AUDIO_ERROR when
R/W
0
ADPG2_DET (Reg 202 bit 2) flag is
set.
0
Asserts AUDIO_ERROR when
R/W
0
ADPG1_DET (Reg 202 bit 1) flag is
set.
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
132 of 152