GS2971A Datasheet, PDF (120/152 Pages) Gennum Corporation – Integrated audio clock generator

Table 4-28:SD Audio Core Configuration and Status Registers (Continued)
Address Register Name Bit Name
40Ah
OUTPUT_SEL_2
RSVD
OP8_SRC
40Bh -
41Fh
420h
421h
422h
423h
RSVD
AFNA12
AFNA34
RATEA
ACT_A
OP7_SRC
OP6_SRC
OP5_SRC
RSVD
RSVD
AFN1_2A
RSVD
AFN3_4A
RSVD
RATE3_4A
ASX3_4A
RATE1_2A
ASX1_2A
RSVD
ACTA
Bit Description
15-12
11-9
8-6
5-3
2-0
−
Reserved.
Output channel 8 source selector.
000: Primary audio group channel
1
001: Primary audio group channel
2
010: Primary audio group channel
3
011: Primary audio group channel
4
100: Secondary audio group
channel 1
101: Secondary audio group
channel 2
110: Secondary audio group
channel 3
111: Secondary audio group
channel 4
Output channel 7 source selector
(Decode as above).
Output channel 6 source selector
(Decode as above).
Output channel 5 source selector
(Decode as above).
Reserved.
15-9
8-0
15-9
8-0
15-8
7-5
4
3-1
0
15-4
3-0
Reserved.
Primary group audio frame
number for channels 1 and 2.
Reserved.
Primary group audio frame
number for channels 3 and 4.
Reserved.
Primary group sampling frequency
for channels 3 and 4
Primary group asynchronous mode
for channels 3 and 4.
Primary group sampling frequency
for channels 1 and 2.
Primary group asynchronous mode
for channels 1 and 2.
Reserved.
Primary group active channels.
R/W
R/W
R/W
R/W
R/W
R/W
−
R/W
R
R/W
R
R/W
R
R
R
R
R/W
R
Default
0
7
6
5
4
−
0
0
0
0
0
0
0
0
0
0
0
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
120 of 152