MB81P643287 Datasheet, PDF (60/65 Pages) Fujitsu Component Limited. – 8 x 256K x 32 BIT, FCRAMTM CORE BASED DOUBLE DATA RATE SDRAM

MB81P643287-50/-60
CAS
CS
CKE
TIMING DIAGRAM - 5: TEST TIMING (1)
Test mode
Entry Command
Test mode
Entry
tETD
Under test
DQ becomes Low-Z at CS = L and CKE = H
A0
Under
Check ^A1
Pins
A2
DQ0 to DQ31
DQS0 to DQS3
tTCA
tTIA
tTIA
tTIA
tTOH
Valid
tTOH
Valid
Valid
tTLZ
60