MB81P643287 Datasheet, PDF (53/65 Pages) Fujitsu Component Limited. – 8 x 256K x 32 BIT, FCRAMTM CORE BASED DOUBLE DATA RATE SDRAM

MB81P643287-50/-60
SCITT TEST SEQUENCE
The followings are the SCITT test sequence. SCITT Test can be executed after power-on and prior to Precharge
command in“s FUNCTION DESCRIPTION POWER-UP INITIALIZATION”. Once Precharge command is issued
to SDRAM, it never get back to SCITT Test Mode during regular operation unless reset power supply for the
purpose of a fail-safe way in get in and out of test mode.
1. Maintain all input signals (except CLK,CLK) to be Low state (or at least CKE to be Low) and maintain
CLK and CLK to be complementary state.
2. Apply VDD voltage to all VDD pins before or at the same time as VDDQ pins.
3. Apply VDD voltage to all VDDQ pins before or at the same time as VREF and VTT.
4. Apply VREF and VTT (VTT is applied to the system).
5. Maintain stable power for a minimum of 100µs.
6. Enter SCITT test mode.
7. Execute SCITT test.
8. Exit from SCITT mode.
It is required to follow Power On Sequence to execute read or write operation.
9. Start clock after all power supplies reached in a specified operating range and maintain stable condition
for a minimum of 200µs.
10. After the minimum of 200µs stable power and clock, apply NOP condition and take CKE to be High
state.
11. Issue Precharge All Banks (PALL) command or Precharge Single Bank (PRE) command to every
banks.
12. Issue EMRS to enable DLL, DE = Low.
13. Issue Mode Register Set command (MRS) to reset DLL, DR = High. An additional clock input for lPCD*¹
period is required to lock the DLL.
14. Apply minimum of two Auto-refresh command (REF).*²
15. Program the mode register by Mode Register Set command (MRS) with DR = Low.*²
The 6,7,8 steps define the SCITT mode available. It is possible to skip these steps if necessary (Refer to “s FUNC-
TION DESCRIPTION POWER-UP INITIALIZATION”).
Notes: *1. The lPCD depends on operating clock period. The lPCD is counted from “DLL Reset” at step-13 to any
command input at step-15.
*2. The Mode Register Set command (MRS) can be issued before two Auto-refresh cycle.
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