MB81P643287 Datasheet, PDF (30/65 Pages) Fujitsu Component Limited. – 8 x 256K x 32 BIT, FCRAMTM CORE BASED DOUBLE DATA RATE SDRAM

MB81P643287-50/-60
s DC CHARACTERISTICS
(At recommended operating conditions unless otherwise noted.) Note *1,*2,*3
Parameter
Symbol
Condition
Value
Unit
Min. Max.
Output Minimum Source DC Current
IOH(DC)
VDDQ = 2.3V,
VOH = VDDQ-0.43V
-15.2 — mA
Output Minimum Sink DC Current
IOL(DC)
VDDQ = 2.3V,
VOL = +0.35V
15.2 — mA
Input Leakage Current (any input)
ILI
0 V ≤ VIN ≤ VDD;
All other pins not under test = 0 V
-10
10 µA
Output Leakage Current
ILO
0 V ≤ VIN ≤ VDD;
Data out disabled
-10 10 µA
VREF Current
IREF
-10 10 µA
Operating Current
(Average Power
Supply Current)
Burst Length = 2
MB81P643287-50
tCK = Min.,
One bank active,
IDD1S Address change up to 3 times dur- —
MB81P643287-60
ing lRC (Min.)
0 V ≤ VIN ≤ VIL (Max.),
VIH (Min.) ≤ VIN ≤ VDD
460
mA
405
Standby Current
CKE = VIH, tCK = Min.
MB81P643287-50
All banks idle,
NOP commands only,
IDD2N Input signals (except to CMD) are —
MB81P643287-60
changed one time during 20 ns
0 V ≤ VIN ≤ VIL (Max.),
VIH (Min.) ≤ VIN ≤ VDD
85
mA
75
Power Down Current
IDD2P
CKE = VIL, tCK = Min.
All banks idle,
0 V ≤ VIN ≤ VDD
— 35 mA
CKE = VIH, tCK = Min.
MB81P643287-50
All banks Active,
Active Standby Current
(Power Supply Current)
NOP commands only,
IDD3N Input signals (except to CMD) are —
changed one time during 20 ns
MB81P643287-60
0 V ≤ VIN ≤ VIL (Max.),
VIH (Min.) ≤ VIN ≤ VDD
260
mA
225
(Continued)
30