MB81P643287 Datasheet, PDF (4/65 Pages) Fujitsu Component Limited. – 8 x 256K x 32 BIT, FCRAMTM CORE BASED DOUBLE DATA RATE SDRAM

MB81P643287-50/-60
s DESCRIPTIONS
Pin Number
1, 3, 9, 15, 29, 35, 41, 43, 49, 55, 75, 81
6, 12, 32, 38, 44, 46, 52, 58, 72, 78, 84, 86
2, 4, 5, 7, 8, 10, 11, 13, 31, 33, 34, 36, 37, 39,
40, 42, 45, 47, 48, 50, 51, 53, 54, 56, 74, 76,
77, 79, 80, 82, 83, 85
14, 30, 57, 73
16, 28, 59, 71
17
18
19
20
21, 22, 23
24
24, 25, 26, 27, 60, 61, 62, 63, 64, 65, 66
67
68
69
70
Symbol
Function
VDD, VDDQ Supply Voltage
VSS, VSSQ
Ground
DQ0 to DQ31 Data I/O
• Byte 0: DQ0 to DQ7
• Byte 1: DQ8 to DQ15
• Byte 2: DQ16 to DQ23
• Byte 3: DQ24 to DQ31
DQS0 to DQS3 Data Strobe
• DQS0: for DQ0 to DQ7
• DQS1: for DQ8 to DQ15
• DQS2: for DQ16 to DQ23
• DQS3: for DQ24 to DQ31
DM0 to DM3 Input Mask
WE
Write Enable
CAS
Column Address Strobe
RAS
Row Address Strobe
CS
Chip Select
BA2, BA1, BA0 Bank Select (Bank Address)
AP
Auto Precharge Enable
A0 to A10 Address Input
• Row: A0 to A10
• Column: A0 to A6
CKE
Power Down
CLK
Clock Input
CLK
Clock Input
VREF
Input Reference Voltage
4