MC9S08DZ128 Datasheet, PDF (414/458 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 18 Debug Module (S08DBGV3) (128K)
18.4.4.3.7 A And Not B (Full Mode)
In the A And Not B trigger mode, comparator A compares to the address bus and comparator B compares
to the data bus. In the A And Not B trigger mode, if the match condition for A and Not B happen on the
same bus cycle, both the AF and BF flags in the DBGS register are set. If a match condition on only A or
only Not B occur no flags are set.
For Breakpoint tagging operation with an end-trigger type trace, only matches from Comparator A will be
used to determine if the Breakpoint conditions are met and Comparator B matches will be ignored.
18.4.4.3.8 Inside Range, A ≤ address ≤ B
In the Inside Range trigger mode, if the match condition for A and B happen on the same bus cycle, both
the AF and BF flags in the DBGS register are set. If a match condition on only A or only B occur no flags
are set.
18.4.4.3.9 Outside Range, address < A or address > B
In the Outside Range trigger mode, if the match condition for A or B is met, the corresponding flag in the
DBGS register is set.
The four control bits BEGIN and TRGSEL in DBGT, and BRKEN and TAG in DBGC, determine the basic
type of debug run as shown in Table 1.21. Some of the 16 possible combinations are not used (refer to the
notes at the end of the table).
Table 18-21. Basic Types of Debug Runs
BEGIN
0
TRGSEL
0
BRKEN
0
0
0
1
0
0
1
0
1
0
0
1
1
0
1
1
1
0
0
1
0
1
1
0
1
1
1
0
1
1
1
1
1
1
TAG
Type of Debug Run
(1)
x
Fill FIFO until trigger address (No CPU breakpoint - keep
running)
0
Fill FIFO until trigger address, then force CPU breakpoint
1
Do not use⁽²⁾
(1)
x
Fill FIFO until trigger opcode about to execute (No CPU
breakpoint - keep running)
0
Do not use⁽³⁾
1
Fill FIFO until trigger opcode about to execute (trigger causes
CPU breakpoint)
(1)
x
Start FIFO at trigger address (No CPU breakpoint - keep
running)
0
Start FIFO at trigger address, force CPU breakpoint when
FIFO full
1
Do not use⁽⁴⁾
(1)
x
Start FIFO at trigger opcode (No CPU breakpoint - keep
running)
0
Start FIFO at trigger opcode, force CPU breakpoint when FIFO
full
1
Do not use⁽⁴⁾
MC9S08DZ128 Series Data Sheet, Rev. 1
414
Freescale Semiconductor