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MC9S08DZ128 Datasheet, PDF (393/458 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Chapter 18
Debug Module (S08DBGV3) (128K)
18.1 Introduction
The DBG module implements an on-chip ICE (in-circuit emulation) system and allows non-intrusive
debug of application software by providing an on-chip trace buffer with ï¬exible triggering capability. The
trigger also can provide extended breakpoint capacity. The on-chip ICE system is optimized for the HCS08
8-bit architecture and supports 64K bytes or 128K bytes of memory space.
18.1.1 Features
The on-chip ICE system includes these distinctive features:
⢠Three comparators (A, B, and C) with ability to match addresses in 128K space
â Dual mode, Comparators A and B used to compare addresses
â Full mode, Comparator A compares address and Comparator B compares data
â Can be used as triggers and/or breakpoints
â Comparator C can be used as a normal hardware breakpoint
â Loop1 capture mode, Comparator C is used to track most recent COF event captured into FIFO
⢠Tag and Force type breakpoints
⢠Nine trigger modes
âA
â A Or B
â A Then B
â A And B, where B is data (Full mode)
â A And Not B, where B is data (Full mode)
â Event Only B, store data
â A Then Event Only B, store data
â Inside Range, A ⤠Address ⤠B
â Outside Range, Address < Î or Address > B
⢠FIFO for storing change of ï¬ow information and event only data
â Source address of conditional branches taken
â Destination address of indirect JMP and JSR instruction
â Destination address of interrupts, RTI, RTC, and RTS instruction
â Data associated with Event B trigger modes
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor
393
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