MC9S08DZ128 Datasheet, PDF (195/458 Pages) Freescale Semiconductor, Inc – Microcontrollers

START
IN BLPI MODE
MCGC2 = $00
OPTIONAL: _NO
CHECK LOCK
= 1?
YES
MCGC2 = $36
CHECK
NO
OSCINIT = 1 ?
YES
MCGC1 = $18
Chapter 8 Multi-Purpose Clock Generator (S08MCGV2)
CHECK
NO
IREFST = 0?
YES
OPTIONAL: _NO
CHECK LOCK
= 1?
YES
CHECK
NO
CLKST = %00?
YES
CONTINUE
IN FEE MODE
Figure 8-12. Flowchart of BLPI to FEE Mode Transition using an 8 MHz crystal
8.5.4 Calibrating the Internal Reference Clock (IRC)
The IRC is calibrated by writing to the MCGTRM register first, then using the FTRIM bit to “fine tune”
the frequency. We will refer to this total 9-bit value as the trim value, ranging from 0x000 to 0x1FF, where
the FTRIM bit is the LSB.
The trim value after reset is the factory trim value unless the device resets into any BDM mode in which
case it is 0x800. Writing a larger value will decrease the frequency and smaller values will increase the
frequency. The trim value is linear with the period, except that slight variations in wafer fab processing
produce slight non-linearities between trim value and period. These non-linearities are why an iterative
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor
195