MC9S08DZ128 Datasheet, PDF (135/458 Pages) Freescale Semiconductor, Inc – Microcontrollers

6.5.9.7
Port J Interrupt Pin Select Register (PTJPS)
Chapter 6 Parallel Input/Output Control
R
W
Reset:
7
PTJPS7
0
6
PTJPS6
5
PTJPS5
4
PTJPS4
3
PTJPS3
2
PTJPS2
1
PTJPS1
0
0
0
0
0
0
Figure 6-58. Port J Interrupt Pin Select Register (PTJPS)
Table 6-56. PTJPS Register Field Descriptions
0
PTJPS0
0
Field
Description
7:0
Port J Interrupt Pin Selects — Each of the PTJPSn bits enable the corresponding port J interrupt pin.
PTJPS[7:0] 0 Pin not enabled as interrupt.
1 Pin enabled as interrupt.
6.5.9.8 Port J Interrupt Edge Select Register (PTJES)
R
W
Reset:
7
PTJES7
0
6
PTJES6
5
PTJES5
4
PTJES4
3
PTJES3
2
PTJES2
0
0
0
0
0
Figure 6-59. Port J Edge Select Register (PTJES)
Table 6-57. PTJES Register Field Descriptions
1
PTJES1
0
0
PTJES0
0
Field
Description
7:0
PTJES[7:0]
Port J Edge Selects — Each of the PTJESn bits serves a dual purpose by selecting the polarity of the active
interrupt edge as well as selecting a pull-up or pull-down device if enabled.
0 A pull-up device is connected to the associated pin and detects falling edge/low level for interrupt generation.
1 A pull-down device is connected to the associated pin and detects rising edge/high level for interrupt
generation.
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor
135