MC9S08DZ128 Datasheet, PDF (391/458 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 17 Development Support
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
BDFR¹
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
1 _{BDFR is writable only through serial background mode debug commands, not from user programs.}
Figure 17-6. System Background Debug Force Reset Register (SBDFR)
Field
0
BDFR
Table 17-3. SBDFR Register Field Description
Description
Background Debug Force Reset — A serial active background mode command such as WRITE_BYTE allows
an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot
be written from a user program.
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor
391