MC9S08DZ128 Datasheet, PDF (413/458 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 18 Debug Module (S08DBGV3) (128K)
end the trace run that was in progress. The ARMF bit is also cleared if ARM is written to zero or when the
DBGEN bit is low. The TBC logic determines whether a trigger condition has been met based on the
trigger mode and the trigger selection.
18.4.4.3 Trigger Modes
The on-chip ICE system supports nine trigger modes. The trigger modes are encoded as shown in
Table 18-17. The trigger mode is used as a qualifier for either starting or ending the storing of data in the
FIFO. When the match condition is met, the appropriate flag AF or BF is set in DBGS register. Arming
the DBG module clears the AF, BF, and CF flags in the DBGS register. In all trigger modes except for the
event only modes change of flow addresses are stored in the FIFO. In the event only modes only the value
on the data bus at the trigger event B comparator match address will be stored.
18.4.4.3.1 A Only
In the A Only trigger mode, if the match condition for A is met, the AF flag in the DBGS register is set.
18.4.4.3.2 A Or B
In the A Or B trigger mode, if the match condition for A or B is met, the corresponding flag(s) in the DBGS
register are set.
18.4.4.3.3 A Then B
In the A Then B trigger mode, the match condition for A must be met before the match condition for B is
compared. When the match condition for A or B is met, the corresponding flag in the DBGS register is set.
18.4.4.3.4 Event Only B
In the Event Only B trigger mode, if the match condition for B is met, the BF flag in the DBGS register is
set. The Event Only B trigger mode is considered a begin-trigger type and the BEGIN bit in the DBGT
register is ignored.
18.4.4.3.5 A Then Event Only B
In the A Then Event Only B trigger mode, the match condition for A must be met before the match
condition for B is compared. When the match condition for A or B is met, the corresponding flag in the
DBGS register is set. The A Then Event Only B trigger mode is considered a begin-trigger type and the
BEGIN bit in the DBGT register is ignored.
18.4.4.3.6 A And B (Full Mode)
In the A And B trigger mode, Comparator A compares to the address bus and Comparator B compares to
the data bus. In the A and B trigger mode, if the match condition for A and B happen on the same bus cycle,
both the AF and BF flags in the DBGS register are set. If a match condition on only A or only B happens,
no flags are set.
For Breakpoint tagging operation with an end-trigger type trace, only matches from Comparator A will be
used to determine if the Breakpoint conditions are met and Comparator B matches will be ignored.
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor
413