XRT7250 Datasheet, PDF (77/463 Pages) Exar Corporation – DS3/E3 FRAMER IC

XRT7250 DS3/E3 FRAMER IC
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REV. 1.1.1
Setting this bit-field to "1" configures the XRT7250 to
output data, via the TxPOS and TxNEG output pins,
on the falling edge of TxLineClk.
Bit 1 - RxLineClk Invert
This Read/Write bit-field permits the user to configure
the XRT7250 to latch data on the RxPOS and Rx-
NEG input pins, into the XRT7250, on the rising or
falling edge of RxLineClk.
Setting this bit-field to "0" configures the XRT7250 to
latch the data on the RxPOS and RxNEG input pins,
into the device, on the rising edge of RxLineClk.
Setting this bit-field to "1" configures the XRT7250 to
latch the data on the RxPOS and RxNEG input pins,
into the device, data, on the falling edge of RxLineClk.
Bit 0 - Reframe
This Read/Write bit-field permits the user to configure
the Receive Section of the XRT7250 to start a new
frame search. A "0" to "1" transition, in this bit-field
will force the chip to start a new frame search.
2.3.2.3 Part Number Register
PART NUMBER REGISTER (ADDRESS = 0X02)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Part Number Value
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
1
1
2.3.2.4 Version Number Register
VERSION NUMBER REGISTER (ADDRESS = 0X03)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Version Number Value
RO
RO
RO
RO
RO
0
0
0
0
0
BIT 2
RO
0
BIT 1
RO
0
BIT 0
RO
1
2.3.2.5 Block Interrupt Enable Register
BLOCK INTERRUPT ENABLE REGISTER (ADDRESS = 0X04)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
RxDS3/E3
Interrupt
Enable
Not Used
R/W
RO
RO
RO
RO
0
0
0
0
0
BIT 2
RO
0
BIT 1
TxDS3/E3
Interrupt
Enable
R/W
0
BIT 0
One-Second
Interrupt
Enable
R/W
0
Bit 7 - RxDS3/E3 Interrupt Enable
This Read/Write bit-field permits the user to enable or
disable all Receive Section related interrupts (within
the XRT7250), at the Block Level.
Setting this bit-field to "0" disables all Receive Section
related Interrupts within the XRT7250.
Setting this bit-field to "1" enables the Receive Sec-
tion related Interrupts (within the XRT7250) at the
block level.
NOTE: Setting this bit-field to "1" does not enable all
Receive Section related Interrupts. Each of these interrupts
can still be disabled at the Source Level. However, setting
this bit-field to "0" does disable all Receive Section related
Interrupts.
Bit 1 - TxDS3/E3 Interrupt Enable
This Read/Write bit-field permits the user to enable or
disable all Transmit Section related interrupts (within
the XRT7250), at the Block Level.
Setting this bit-field to "0" disables all Transmit Sec-
tion related Interrupts within the XRT7250.
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