XRT7250 Datasheet, PDF (29/463 Pages) Exar Corporation – DS3/E3 FRAMER IC

XRT7250 DS3/E3 FRAMER IC
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PIN DESCRIPTION
PIN #
63
NAME
TxLineClk
64
TxNEG
65
TxPOS
66
ENCODIS
TYPE
DESCRIPTION
O Transmit Line Interface Clock:
This clock signal is output to the Line Interface Framer, along with the TxPOS
and TxNEG signals. The purpose of this output clock signal is to provide the
LIU with timing information that it can use to generate the AMI pulses and
deliver them over the transmission medium to the Far-End Receiver. The user
can configure the source of this clock to be either the RxLineClk (from the
Receiver portion of the Framer) or the TxInClk input. The nominal frequency of
this clock signal is 34.368 MHz.
O Transmit Negative Polarity Pulse:
The exact role of this output pin depends upon whether the Framer is operating
in the Unipolar or Bipolar Mode.
Unipolar Mode:
This output signal pulses "high" for one bit period, at the beginning of each
"outbound" DS3 or E3 frame. This output signal is at a logic "low" for all of the
remaining bit-periods of the "outbound" DS3 or E3 frames
Bipolar Mode:
This output pin functions as one of the two dual-rail output signals that com-
mands the sequence of pulses to be driven on the line. TxPOS is the other out-
put pin. This input is typically connected to the TNDATA input of the external
DS3/E3 Line Interface Unit IC. When this output is asserted, it will command
the LIU to generate a negative polarity pulse on the line.
O Transmit Positive Polarity Pulse:
The exact role of this output pin depends upon whether the Framer is operating
in the Unipolar or Bipolar Mode.
Unipolar Mode:
This output pin functions as the "Single-Rail" output signal for the "outbound"
DS3 or E3 data stream. The signal, at this output pin, will be updated on the
"user-selected" edge of the TxLineClk signal.
Bipolar Mode:
This output pin functions as one of the two dual rail output signals that com-
mands the sequence of pulses to be driven on the line. TxNEG is the other out-
put pin. This input is typically connected to the TPDATA input of the external
DS3 or E3 Line Interface Unit IC. When this output is asserted, it will command
the LIU to generate a positive polarity pulse on the line
O Encoder (HDB3) Disable Output pin (intended to be connected to
the XRT7300 DS3/E3 Line Interface Unit IC).
This output pin is intended to be connected to the Encodis input pin of the
XRT7300 DS3/E3 Line Interface Unit IC. The user can control the state of this
output pin by writing a "0" or "1" to Bit 3 (Encodis) within the Line Interface
Driver Register (Address = 0x80). If the user commands this signal to toggle
"high" then it will disable the B3ZS/HDB3 encoder circuitry within the XRT7300
IC. Conversely, if the user commands this output signal to toggle "low", then the
B3ZS/HDB3 Encoder circuitry, within the XRT7300 IC will be enabled.
Writing a "1" to Bit 3 of the Line Interface Driver Register (Address = 0x80) will
cause this output pin to toggle "high". Writing a "0" to this bit-field will cause
this output pin to toggle "low".
The user is advised to disable the B3ZS/HDB3 encoder (within the XRT7300
IC) if the XRT7250 Framer IC has been configured to operate in the B3ZS/
HDB3 line code.
NOTE: If the customer is not using the XRT7300 DS3/E3 Line Interface Unit IC,
then he/she can use this output pin for a variety of other purposes.
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