XRT7250 Datasheet, PDF (108/463 Pages) Exar Corporation – DS3/E3 FRAMER IC

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DS3/E3 FRAMER IC
XRT7250
REV. 1.1.1
TXDS3 F-BIT MASK REGISTER - 1 (ADDRESS = 0X36)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used
FBit Mask[27] FBit Mask[26] FBit Mask[25] FBit Mask[24]
RO
RO
RO
RO
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Bits 3 - 0 F-Bit Mask[27:24]
These Read/Write bit-fields permit the user to insert
errors into the first four F-bits of a DS3 M-frame, for
test and diagnostic purposes. The Transmit DS3
Framer block automatically performs an XOR opera-
tion on the actual contents of these F-bit fields to
these register bit-fields. Therefore, for every "1" that
exists in these bit-fields, this will result in a change of
state for the corresponding F-bit, prior to being trans-
mitted to the Far-End Receive DS3 Framer.
If the Transmit DS3 Framer is to be operated in the
normal mode (e.g., when no errors are being injected
into these F-bit fields of the outbound DS3 frames),
then all of these bit-fields must be "0’s".
2.3.5.8 Transmit DS3 F-Bit Mask Register - 2
(DS3 Applications)
TXDS3 F-BIT MASK REGISTER - 2 (ADDRESS = 0X37)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
FBit Mask[23] FBit Mask[22] FBit Mask[21] FBit Mask[20] FBit Mask[19] FBit Mask[18] FBit Mask[17] FBit Mask[16]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Bits 7 - 0 F-Bit Mask[23:16]
These Read/Write bit-fields permit the user to insert
errors into the fifth through twelfth F-bits of a DS3 M-
frame, for test and diagnostic purposes. The Trans-
mit DS3 Framer block automatically performs an XOR
operation on the actual contents of these F-bit fields
to these register bit-fields. Therefore, for every "1"
that exists in these bit-fields, this will result in a
change of state for the corresponding F-bit, prior to
being transmitted to the Remote Terminal Equipment.
If the Transmit DS3 Framer block is to be operated in
the normal mode (e.g., when no errors are being in-
jected into these F-bit fields of the outbound DS3
frames), then all of these bit-fields must be "0’s".
2.3.5.9 Transmit F-Bit Mask Register - 3 (DS3
Applications)
TXDS3 F-BIT MASK REGISTER - 3 (ADDRESS = 0X38)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
FBit Mask[15] FBit Mask[14] FBit Mask[13] FBit Mask[12] FBit Mask[11] FBit Mask[10] FBit Mask[9] FBit Mask[8]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Bits 7 - 0 F-Bit Mask[15:8]
These Read/Write bit-fields permit the user to insert
errors into the thirteenth through twentieth F-bits of a
DS3 M-frame, for test and diagnostic purposes. The
Transmit DS3 Framer block automatically performs an
XOR operation on the actual contents of these F-bit
fields to these register bit-fields. Therefore, for every
"1" that exists in these bit-fields, this will result in a
change of state for the corresponding F-bit, prior to
being transmitted to the Remote Terminal Equipment.
If the Transmit DS3 Framer block is to be operated in
the normal mode (e.g., when no errors are being in-
jected into these F-bit fields of the outbound DS3
frames), then all of these bit-fields must be "0’s".
2.3.5.10 Transmit F-Bit Mask Register - 4 (DS3
Applications)
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