XRT7250 Datasheet, PDF (209/463 Pages) Exar Corporation – DS3/E3 FRAMER IC

XRT7250 DS3/E3 FRAMER IC
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REV. 1.1.1
occur in a repeating 1001 pattern. The Receive DS3
Framer block will attempt to locate this F-bit pattern
by performing five (5) different searches in parallel.
The F-bit search has been declared successful if at
least 10 consecutive F-bits are detected. After the F-
bit match has been declared, the Receive DS3 Fram-
er block will then transition into the M-Bit Search state
within the DS3 Frame Acquisition/Maintenance algo-
rithm (per Figure 81). When the Receive DS3 Framer
block reaches this state, it will begin searching for val-
id M-bits. Recall from the discussion in Section 3.1
that each DS3 M-frame consists of three (3) M-bits
that occur in a repeating 010 pattern. The M-bit
search is declared successful if three consecutive M-
frames (or 21 F-frames) are detected correctly. Once
this occurs an M-frame lock is declared, and the Re-
ceive DS3 Framer block will then transition to the In-
Frame state. At this point, the Receive DS3 Framer
block will declare itself in the In-Frame condition, and
will begin Frame Maintenance operations. The Re-
ceive DS3 Framer block will then indicate that it has
transitioned from the OOF condition into the In-Frame
condition by doing the following.
• Generate a Change in OOF Condition interrupt to
the local µP.
• Negate the RxOOF output pin (e.g., toggle it
"Low").
• Negate the RxOOF bit-field (Bit 4) within the
Receive DS3 Configuration and Status Register.
The user can configure the Receive DS3 Framer to
operate such that 'valid parity' (P-bits) must also be
detected before the Receive DS3 Framer can declare
itself In Frame. The user can set this configuration by
writing the appropriate data to the Rx DS3 Configura-
tion and Status Register, as depicted below.
RX DS3 CONFIGURATION AND STATUS REGISTER, (ADDRESS = 0X10)
BIT 7
RxAIS
BIT 6
RxLOS
BIT 5
RxIdle
BIT 4
RxOOF
RO
RO
RO
RO
X
X
X
X
Table 37 relates the contents of this bit field to the
framing acquisition criteria.
BIT 3
Int LOS
Disable
R/W
X
BIT2
Framing on
Parity
R/W
X
BIT 1
BIT 0
F-Sync Algo M-Sync Algo
R/W
R/W
X
X
TABLE 37: THE RELATIONSHIP BETWEEN THE CONTENTS OF BIT 2 (FRAMING ON PARITY) WITHIN THE RX DS3
CONFIGURATION AND STATUS REGISTER, AND THE RESULTING FRAMING ACQUISITION CRITERIA
FRAMING
ON PARITY
(BIT 2)
FRAMING ACQUISITION CRITERIA
0
The In-frame is declared after F-bit synchronization (10 F-bit matches) followed by M-bit synchronization (M-
bit matches for 3 DS3 M-frames)
1
The In-frame condition is declared after F-bit synchronization, followed by M-bit synchronization, with valid
parity over the frames. Also, the occurrence of parity errors in 2 or more out of 5 frames starts a frame search
Once the Receive DS3 Framer block is operating in
the In-Frame condition, normal data recovery and
processing of the DS3 data stream begins. The max-
imum average reframing time is less than 1.5 ms.
4.3.2.2 Frame Maintenance Mode Operation
When the Receive DS3 Framer block is operating in
the In-Frame state (per Figure 81), it will then begin to
perform Frame Maintenance operations, where it will
continue to verify that the F- and M-bits are present,
at their proper locations. While the Receive DS3
Framer block is operating in the Frame Maintenance
mode, it will declare an Out-of-Frame (OOF) condition
if 3 or 6 F-bits (depending upon user selection) out of
16 consecutive F-bits are in error. The user makes
this selection for the OOF Declaration criteria by writ-
ing the appropriate value to bit 1 (F-Sync Algo) of the
Rx DS3 Configuration and Status Register, as depict-
ed below.
190