XRT7250 Datasheet, PDF (24/463 Pages) Exar Corporation – DS3/E3 FRAMER IC

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PIN DESCRIPTION
PIN #
25
NAME
NibbleIntf
26
GND
27
MOTO
28
RESET
29
GND
30
VDD
31
GND
32
D0
33
D1
34
D2
35
D3
36
D4
37
D5
DS3/E3 FRAMER IC
XRT7250
REV. 1.1.1
TYPE
DESCRIPTION
I Nibble Interface Select Input Pin
This input pin allows the user to configure the Transmit Payload Data Input
Interface and the Receive Payload Data Output Interface to operate in either
the "Serial-Mode" or the "Nibble/Parallel-Mode".
Setting this input pin "high" configures the Transmit and Receive Terminal Inter-
faces to operate in the "Nibble/Parallel-Mode". In this mode, the “Transmit Pay-
load Data Input Interface” block will accept the “outbound” payload data (from
the Terminal Equipment) in a “nibble-parallel” manner via the “TxNib[3:0]” input
pins. Further, the “Receive Payload Data Output Interface” block will output the
“inbound” payload data (to the Terminal Equipment) in a “nibble-parallel” man-
ner via the “RxNib[3:0]” output pin.
Setting this input pin "low" configures the Transmit and Receive Terminal Inter-
faces to operate in the "Serial" Mode. In this mode, the “Transmit Payload Data
Input Interface” block will accept the “outbound” payload data (from the Termi-
nal Equipment) in a “serial” manner via the “TxSer” input pin. Further, the
“Receive Payload Data Output Interface” block will output the “inbound” pay-
load data (to the Terminal Equipment) in a “serial” manner via the “RxSer” out-
put pin.
**** Ground Pin
I Motorola/Intel Processor Interface Select Mode:
This input pin allows the user to configure the Microprocessor Interface to inter-
face with either a "Motorola-type" or "Intel-type" microprocessor/microcontrol-
ler. Tying this input pin to VCC, configures the microprocessor interface to
operate in the Motorola mode (e.g., the Framer device can be readily interfaced
to a "Motorola type" local microprocessor). Tying this input pin to GND config-
ures the Microprocessor Interface to operate in the Intel Mode (e.g., the Framer
device can be readily interfaced to a “Intel type" local microprocessor).
I Reset Input:
When this "active-low" signal is asserted, the Framer device will be asynchro-
nously reset. Additionally, all outputs will be "tri-stated", and all on-chip regis-
ters will be reset to their default values.
**** Ground Pin
**** Power Supply Pin
**** Ground Pin
I/O Bi-directional Data Bus (Microprocessor Interface Section):
Please see description for D7, pin 39
I/O Bi-directional Data Bus (Microprocessor Interface Section):
Please see description for D7, pin 39
I/O Bi-directional Data Bus (Microprocessor Interface Section):
Please see description for D7, pin 39
I/O Bi-directional Data Bus (Microprocessor Interface Section):
Please see description for D7, pin 39
I/O Bi-directional Data Bus (Microprocessor Interface Section):
Please see description for D7, pin 39
I/O Bi-directional Data Bus (Microprocessor Interface Section):
Please see description for D7, pin 39
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