XRT7250 Datasheet, PDF (18/463 Pages) Exar Corporation – DS3/E3 FRAMER IC

áç
DS3/E3 FRAMER IC
XRT7250
REV. 1.1.1
Figure 194.The State Machine Diagram for the Receive E3 Framer E3 Frame Acquisition/Maintenance Algo-
rithm .............................................................................................................................................................. 392
Figure 195.Illustration of the E3, ITU-T G.832 Framing Format ................................................................... 393
Figure 196.Illustration of the Local Receive E3 Framer block, receiving an E3 Frame (from the Remote Termi-
nal) with a correct EM Byte. .......................................................................................................................... 401
Figure 197.Illustration of the Local Receive E3 Framer block, transmitting an E3 Frame (to the Remote Termi-
nal) with the FEBE bit (within the MA byte-field) set to “0” ........................................................................... 401
Figure 198.Illustration of the Local Receive E3 Framer block, receiving an E3 Frame (from the Remote Termi-
nal) with an incorrect EM Byte. ..................................................................................................................... 402
Figure 199.Illustration of the Local Receive E3 Framer block, transmitting an E3 Frame (to the Remote Termi-
nal) with the FEBE bit (within the MA byte-field) set to “1” ........................................................................... 403
Figure 200.LAPD Message Frame Format ................................................................................................... 406
Figure 201.Flow Chart depicting the Functionality of the LAPD Receiver .................................................... 411
Figure 202.Flow Chart depicting the Functionality of the LAPD Receiver (Continued) ................................ 412
Figure 203.A Simple Illustration of the Receive Overhead Output Interface block ....................................... 412
Figure 204.Illustration of how to interface the Terminal Equipment to the Receive Overhead Data Output Inter-
face block (for Method 1). ............................................................................................................................. 413
Figure 205.Illustration of the signals that are output via the Receive Overhead Output Interface (for Method 1).
417
Figure 206.Illustration of how to interface the Terminal Equipment to the Receive Overhead Data Output Inter-
face block (for Method 2). ............................................................................................................................. 419
Figure 207.Illustration of the signals that are output via the Receive Overhead Data Output Interface block (for
Method 2). .................................................................................................................................................... 422
Figure 208.A Simple illustration of the Receive Payload Data Output Interface block ................................. 423
Figure 209.Illustration of the Receive Payload Data Output Interface Block (of the XRT7250 DS3/E3 Framer IC)
being interfaced to the Receive Terminal Equipment (Serial Mode Operation) ........................................... 425
Figure 210.An Illustration of the behavior of the signals between the Receive Payload Data Output Interface
block of the XRT7250 and the Terminal Equipment ..................................................................................... 426
Figure 211.Illustration of the XRT7250 DS3/E3 Framer IC being interfaced to the Receive Section of the Termi-
nal Equipment (Nibble-Mode Operation) ...................................................................................................... 427
Figure 212.Illustration of the signals that are output via the Receive Overhead Data Output Interface block (for
Method 2). .................................................................................................................................................... 428
Figure 213.Illustration of the Framer Local Loop-back path, within the XRT7250 DS3/E3 Framer IC ......... 441
XVI