XRT7250 Datasheet, PDF (52/463 Pages) Exar Corporation – DS3/E3 FRAMER IC

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DS3/E3 FRAMER IC
XRT7250
REV. 1.1.1
FIGURE 17. MICROPROCESSOR INTERFACE TIMING - INTEL TYPE READ BURST ACCESS OPERATION
ALE_AS
A[8:0]
CS*
D[15:0]
RD_DS
WR_RW
RDY_DTCK
t76
Address of “Initial” Target Register (Offset = 0x00)
t68
Not Valid Valid Data at Offset =0x01
Not Valid Valid Data at Offset =0x02
t70
FIGURE 18. MICROPROCESSOR INTERFACE TIMING - INTEL TYPE WRITE BURST ACCESS OPERATION
ALE_AS
A[8:0]
CS
D[15:0]
RD_DS
WR_RW
t76
Address of “Initial” Target Register (Offset = 0x00)
t68
Not Valid Valid Data at Offset =0x01
Not Valid Valid Data at Offset =0x02
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