XRT7250 Datasheet, PDF (110/463 Pages) Exar Corporation – DS3/E3 FRAMER IC

áç
DS3/E3 FRAMER IC
XRT7250
ceive E3 Framer conditions or upon the content of the
Tx MA Byte register (Address = 0x2A).
FERF and FEBE values are based upon Receive E3
Framer Conditions
If the user selects Receive E3 Framer conditions,
then the Transmit E3 Framer will set and clear the
FERF and FEBE bit-fields in response to the following
conditions.
a. FERF Bit-field
If the Receive E3 Framer (on the same UNI chip) is
currently experiencing an LOS, AIS, or LOF condi-
tion, then the Transmit E3 Framer will set the FERF
bit-field (in the outbound E3 frame) to "1". Converse-
ly, if the Receive E3 Framer is not experiencing any of
these conditions, then the Transmit E3 Framer will set
the FERF bit-field (in the outbound E3 frame) to "0".
b. FEBE bit-field
If the Receive E3 Framer detects a BIP-8 error in the
incoming E3 frame, then the Transmit E3 Framer will
set the FEBE bit-field (in the outbound E3 frame) to
"1". Conversely, if the Receive E3 Framer does not
detect a BIP-8 error in the incoming E3 frame, then
REV. 1.1.1
the Transmit E3 Framer will set the FEBE bit-field (in
the E3 outbound E3 frame) to "0".
FEBE and FERF values are based upon the contents
of the Tx MA Byte register
If the user selects the contents of the Tx MA Byte reg-
ister, then whatever value has been written into bit 7
(FERF), within the Tx MA Byte register (Address =
2Ah), will be the value of the FERF bit-field, in the
outbound E3 frame. Likewise, whatever value has
been written into Bit 6 (FEBE) within the Tx MA Byte
register, will be the value of the FEBE bit-field, in the
outbound E3 frame.
Writing a "1" into Bit 0 (MAx) within the Tx E3 Config-
uration register configures the Transmit E3 Framer to
set the FERF and FEBE bit-fields (in the outbound E3
frames) to values based upon Receive E3 Framer
conditions. Writing a "0" into this bit-field configures
the Transmit E3 Framer to set the FEBE and FEBE
bit-fields (in the outbound E3 frames) to the values
written into bit-fields 6 and 7 within the Tx MA Byte
register.
2.3.6.2 Transmit E3 LAPD Configuration Reg-
ister (E3, ITU-T G.832)
TXE3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Not Used
Auto
Retransmit
RO
RO
RO
RO
R/W
0
0
0
0
1
BIT 2
Not Used
RO
0
BIT 1
TxLAPD
Msg Length
R/W
0
BIT 0
TxLAPD
Enable
R/W
0
Bit 3 - Auto Retransmit
This Read/Write bit-field allows the user to configure
the LAPD Transmitter to either transmit the LAPD
Message frame only once, or repeatedly at one-sec-
ond intervals.
Writing a "0" to this bit-field configures the LAPD
Transmitter to transmit the LAPD Message frame
once. Afterwards, the LAPD Transmitter will halt
transmission, until it has commanded to transmit an-
other LAPD Message frame.
Writing a "1" to this bit-field configures the LAPD
Transmitter to transmit the LAPD Message frame re-
peatedly at One-Second intervals. In this configura-
tion, the LAPD Transmitter will repeat its transmission
of the LAPD Message frame until it has been dis-
abled.
Bit 1 - TxLAPD Message Length Select
This Read/Write bit-field permits the user to select
the length of the outbound LAPD Message frame.
Setting this bit-field to "0" configures the outbound
LAPD Message frame to be 76 bytes in length. Set-
ting this bit-field to "1" configures the outbound LAPD
Message frame to be 82 bytes in length.
Bit 0 - TxLAPD Enable
This Read/Write bit-field allows the user to enable or
disable the LAPD Transmitter. The LAPD Transmitter
must be enabled before it can be commanded to
transmit a LAPD Message frame (containing a PMDL
message) via the outbound DS3 frames, to the Far-
End Terminal.
Writing a "0" disables the LAPD Transmitter (default
condition). Writing a "1" enables the LAPD Transmit-
ter.
NOTE: For information on the LAPD Transmitter, please see
Section 3.2.3.2.
91