XRT7250 Datasheet, PDF (20/463 Pages) Exar Corporation – DS3/E3 FRAMER IC

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DS3/E3 FRAMER IC
XRT7250
REV. 1.1.1
that is output by the Transmit DS3 LIU Interface Block ................................................................................ 178
Table 34:The Relationship between the contents of Bit 2 (TxLineClk Inv) within the I/O Control Register and the
TxLineClk clock edge that TxPOS and TxNEG are updated on ................................................................... 178
Table 35:The Relationship between the contents of Bit 2 (TxLineClk Inv) within the I/O Control Register and the
TxLineClk clock edge that TxPOS and TxNEG are updated on ................................................................... 184
Table 36:The Relationship between the contents of Bit 1 (RxLineClk Inv) of the I/O Control Register, and the
sampling edge of the RxLineClk signal ........................................................................................................ 187
Table 37:The Relationship between the contents of Bit 2 (Framing on Parity) within the Rx DS3 Configuration
and Status Register, and the resulting Framing Acquisition Criteria ............................................................ 190
Table 38:The Relationship between the contents of Bit 1 (F-Sync Algo) within the Rx DS3 Configuration and
Status Register, and the resulting F-bit OOF Declaration criteria used by the Receive DS3 Framer block . 191
Table 39:The Relationship between the contents of Bit 0 (M-Sync Algo) within the Rx DS3 Configuration and
Status Register, and the resulting M-Bit OOF Declaration Criteria used by the Receive DS3 Framer block 191
Table 40:The Relationship between RxLAPDType[1:0] and the resulting LAPD Message type and size ... 203
Table 41:Listing and Description of the Pin Associated with the Receive Overhead Data Output Interface Block
206
Table 42:The Relationship between the Number of Rising Clock Edges in RxOHClk, (since RxOHFrame was
last sampled "High") to the DS3 Overhead Bit, that is being output via the RxOH output pin ...................... 208
Table 43:Listing and Description of the Pin Associated with the Receive Overhead Data Output Interface Block
(Method 2) .................................................................................................................................................... 211
Table 44:The Relationship between the Number of RxOHEnable output pulses ((since RxOHFrame was last
sampled "High") to the DS3 Overhead Bit, that is being output via the RxOH output pin ............................ 213
Table 45:Listing and Description of the pin associated with the Receive Payload Data Output Interface block .
217
Table 46:Listing and Description of the pins associated with the Transmit Payload Data Input Interface ... 237
Table 47:A Listing of the Overhead bits within the E3 frame, and their potential sources, within the XRT7250 IC
254
Table 48:Description of Method 1 Transmit Overhead Input Interface Signals ............................................ 255
Table 49:The Relationship between the Number of Rising Clock Edges in TxOHClk, (since TxOHFrame was
last sampled "High") to the E3 Overhead Bit, that is being processed ......................................................... 257
Table 50:Description of Method 2 Transmit Overhead Input Interface Signals ............................................ 259
Table 51:The Relationship between the Number of TxOHEnable pulses (since the last occurrence of the TxO-
HFrame pulse) to the E3 Overhead Bit, that is being processed by the XRT7250 ...................................... 261
Table 52:The LAPD Message Type and the Corresponding value of the First Byte, within the Information Pay-
load ............................................................................................................................................................... 263
Table 53:Relationship between TxLAPD Msg Length and the LAPD Message Size ................................... 265
Table 54:The Relationship between the contents of Bit 2 (Tx AIS Enable) within the Tx E3 Configuration Regis-
ter, and the resulting Transmit E3 Framer Block's Action ............................................................................. 272
Table 55:The Relationship between the contents of Bit 1 (Tx LOS) within the Tx E3 Configuration Register, and
the resulting Transmit E3 Framer Block's Action .......................................................................................... 272
Table 56:The Relationship between the content of Bit 3 (Unipolar/Bipolar*) within the UNI I/O Control Register
and the Transmit E3 Framer Line Interface Output Mode ............................................................................ 278
Table 57:The Relationship between Bit 4 (AMI/HDB3*) within the I/O Control Register and the Bipolar Line Code
that is output by the Transmit E3 LIU Interface Block .................................................................................. 280
Table 58:The Relationship between the contents of Bit 2 (TxLineClk Inv) within the I/O Control Register and the
TxLineClk clock edge that TxPOS and TxNEG are updated on ................................................................... 280
Table 59:The Relationship between the contents of Bit 2 (TxLineClk Inv) within the I/O Control Register and the
TxLineClk clock edge that TxPOS and TxNEG are updated on ................................................................... 285
Table 60:The Relationship between the contents of Bit 1 (RxLineClk Inv) of the I/O Control Register, and the
sampling edge of the RxLineClk signal ........................................................................................................ 288
Table 61:The Relationship between the Logic State of the RxOOF and RxLOF output pins, and the Framing
State of the Receive E3 Framer block .......................................................................................................... 295
Table 62:The Relationship between the Contents of RxLAPDType[1:0] bit-fields and the PMDL Message Type/
Size ............................................................................................................................................................... 307
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