XRT7250 Datasheet, PDF (75/463 Pages) Exar Corporation – DS3/E3 FRAMER IC

XRT7250 DS3/E3 FRAMER IC
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REV. 1.1.1
This Read/Write bit-field permits the user to com-
mand the Framer chip to operate in the Local Loop-
back Mode.
Setting this bit-field to "0", configures the Framer chip
to operate in the Normal Mode. Setting this bit-field
to "1", configures the Framer chip to operate in the
Local-Loopback Mode.
NOTE: For a detailed description of the Local Loopback
Mode, please see Section 6.0
Bit 6 - DS3/E3* Select
This Read/Write bit-field permits the user to com-
mand the Framer chip to operate in either the DS3
Mode or the E3 Mode.
Setting this bit-field to "0", configures the Framer chip
to operate in the E3 Mode. Setting this bit-field to "1",
configures the Framer chip to operate in the DS3
Mode.
Bit 5 - Internal LOS Enable Select
This Read/Write bit-field permits the user to configure
the Framer chip to either declare an LOS condition,
based upon the Internal Circuit's criteria or not.
Setting this bit-field to "0", configures the Framer chip
to NOT declare an LOS condition, based upon its
own internal criteria.
Setting this bit-field to "1", configures the Framer chip
to declare an LOS condition based upon its own inter-
nal criteria.
NOTES:
1. The XRT7250 Framer Chip will declare an LOS
condition, anytime the RLOS input pin (pin 78) is
set "High", independent of the setting of this bit-
field.
2. For more information on the XRT7250 Framer
device's internal criteria for Loss of Signal please
see Section 3.3.2.5.
Bit 4 - RESET:
This Read/Write bit-field permits the user to com-
mand the XRT7250 Framer chip into the Reset state.
If the XRT7250 Framer chip is commanded into the
Reset state, all of its internal register bits will auto-
matically be set to their default condition.
Setting this bit-field to "0" configures the XRT7250
Framer chip to operate normally. Setting this bit-field
to "1" configures the XRT7250 Framer chip to go into
the Reset Mode.
Bit 3 - Interrupt Enable Reset
This Read/Write bit-field permits the user to configure
the XRT7250 Framer chip to automatically disable all
Interrupts that are activated.
Setting this bit-field to "0" configures the XRT7250
Framer chip to NOT disable the Interrupt Enable Sta-
tus, of any interrupts, following their activation.
Setting this bit to "1" configures the XRT7250 Framer
chip to automatically disable any interrupt that is acti-
vated.
NOTE: For more information on this feature, please see
Section 1.6.1.
Bit 2 - Frame Format Select
This Read/Write bit-field, along with the DS3/E3 se-
lect bit-field (bit 6 in this register) permits the user to
select the Framing Format that the XRT7250 will op-
erate in. The following table relates the states of this
bit-field (bit 2) and that of bit 6 to the selected framing
format for this chip.
BIT 6 - DS3/E3*
SELECT
0
0
1
1
BIT 2 - FRAME SELECTED FRAMING
FORMAT SELECT
FORMAT
0
E3, ITU-T G.751
1
E3, ITU-T G.832
0
DS3, C-bit Parity
1
DS3, M13
Bits 1 & 0 - TimRefSel[1:0] - Timing Reference Se-
lect
These two Read/Write bit-fields permits the user to
select both a Framing Reference and Timing Refer-
ence for the Transmit Section of the XRT7250. The
following table relates the states of these two bit-
fields to the selected Framing and Timing references.
TIMREFSEL[1:0]
00
01
10
11
FRAMING
REFERENCE
TIMING REFERENCE
Asynchronous
RxLineClk Input
Signal
TxFrameRef
TxInClk Input sig-
nal
Asynchronous TxInClk Input sig-
nal
Asynchronous TxInClk Input sig-
nal
NOTE: For more information on Framing and Timing Refer-
ences, please see Section 3.2.
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