XRT7250 Datasheet, PDF (157/463 Pages) Exar Corporation – DS3/E3 FRAMER IC

XRT7250 DS3/E3 FRAMER IC
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REV. 1.1.1
The XRT7250 will receive the DS3 payload data, in a
serial manner, via the TxSer input pin. The Transmit
Payload Data Input Interface (within the XRT7250)
will latch this data into its circuitry, on the rising edge
of the TxInClk input clock signal.
C. Delineation of outbound DS3 frames (Frame
Slave Mode)
The Transmit Section (of the XRT7250) will use the
TxInClk input as its timing reference, and will use the
TxFrameRef input signal as its framing reference. In
other words, the Transmit Section of the XRT7250 will
initiate frame generation upon the rising edge of the
TxFrameRef input signal).
D. Sampling of payload data, from the Terminal
Equipment
In Mode 2, the XRT7250 will sample the data, at the
TxSer input pin, on the rising edge of TxInClk.
Interfacing the Transmit Payload Data Input Inter-
face block (of the XRT7250) to the Terminal Equip-
ment for Mode 2 Operation
Figure 46 presents an illustration of the Transmit Pay-
load Data Input Interface block (within the XRT7250)
being interfaced to the Terminal Equipment, for Mode
2 operation.
FIGURE 46. ILLUSTRATION OF THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA
INPUT INTERFACE BLOCK OF THE XRT7250 FOR MODE 2 (SERIAL/LOCAL-TIMED/FRAME-SLAVE) OPERATION
44.736 MHz Clock
Source
DS3_Clock_In
DS3_Data_Out
Tx_Start_of_Frame
DS3_Overhead_Ind
TxInClk
TxSer
TxFrameRef
TxOH_Ind
NibInt
Terminal Equipment
XRT7250 DS3 Framer
Mode 2, Operation of the Terminal Equipment
As shown in Figure 46, both the Terminal Equipment
and the XRT7250 will be driven by an external
44.736MHz clock signal. The Terminal Equipment
will receive the 44.736MHz clock signal via its
DS3_Clock_In input pin, and the XRT7250 Framer IC
will receive the 44.736MHz clock signal via the TxIn-
Clk input pin.
The Terminal Equipment will serially output the pay-
load data of the outbound DS3 data stream, via the
DS3_Data_Out output pin, upon the rising edge of
the signal at the DS3_Clock_In input pin.
NOTE: The DS3_Data_Out output pin of the Terminal
Equipment is electrically connected to the TxSer input pin.
The XRT7250 Framer IC will latch the data, residing
on the TxSer input line, on the rising edge of the TxIn-
Clk signal.
In this case, the Terminal Equipment has the respon-
sibility of providing the framing reference signal by
pulsing its Tx_Start_of_Frame output signal (and in
turn, the TxFrameRef input pin of the XRT7250),
"High" for one-bit period, coincident with the first bit of
a new DS3 frame. Once the XRT7250 detects the
rising edge of the input at its TxFrameRef input pin, it
will begin generation of a new DS3 frame.
NOTES:
1. In this case, the Terminal Equipment is controlling
the start of Frame Generation, and is therefore
referred to as the Frame Master. Conversely, since
the XRT7250 does not control the generation of a
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