AMD-766 Datasheet, PDF (89/96 Pages) Advanced Micro Devices – Peripheral Bus Controller

23167B – March 2001
Preliminary Information
AMD-766^TM Peripheral Bus Controller Data Sheet
6.4 Power Dissipation
The following table provides current consumption of the IC while it is operational.
Supply
Max
VDD3
200 mA
VDD_REF
1.0 mA
VDD_USB
50 mA
Note: This table contains preliminary information, which is subject to change.
6.5 Switching Characteristics
Switching characteristics for PCI signals are available in the PCI specification. Switching characteristics for the IDE
signals are available from the ATA specification. Switching characteristics for the USB signals are available from
the USB specification.
7 Pin Designations
Top side view
123456
A ^{SA1 SA2 SD7 IOCHK# GPIO 22 AD3}
B ^{GPIO17 SA0 SD5 SD6 GPIO26 AD1}
C ^{LA23 GPIO19 SD4 IRQ9 STRAP AD0}
L0
D ^{LA22 GPIO18 SD3 VDD3 TEST# AD5}
E ^{LA21 IRQ10 SD2 EKIRQ}
12
F ^{LA20 IRQ11 SD0 SD1}
G ^{LA19 IRQ12 GPIO25 IOCH}
RDY
H ^{LA18 IRQ15 SA16 GPIO21}
J ^{LA17 IRQ14 IOW# GPIO20}
K ^{MEMR# KA20G CPU IOR#}
SLEEP#
L ^{MEMW# KBRC# GPIO9 VDD3}
M ^{LAD0 STRAP SA14 SA15}
L2
N ^{LAD1 GPIO2 PRDY VDD_}
REF
P ^{LAD2 GPIO29 EKIRQ1 SA13}
R ^{LAD3 GPIO28 GPIO23 SA12}
7 8 9 10 11 12 13 14 15 16 17 18 19 20
AD2 CBE AD12 AD14 SERR # TRDY # CBE AD21 AD22 AD25 AD29 AD31 PGNT # PCLK _A
_L0
_L2
AD6 AD8 AD10 AD13 AD15 STOP # IDSEL AD18 AD20 AD23 AD27 AD30 PREQ # USB _B
OC0#
AD4 AD9 CBE DEV FRAME AD17 AD19 AD24 AD28 PIRQA# PIRQD# PIRQB# USB VDD_ _C
_L1 SEL# #
CLK USB
AD7 AD11 PAR IRDY# VDD3 AD16 CBE AD26 STRAP PIRQC# VDD3 USBP3 USBN3 USBP2 _D
_L3
L3
USBN2 USBP1 USBN1 USBP0 _E
VSS VSS VSS VSS
VSS VSS VSS VSS
VSS VSS VSS VSS
VSS VSS VSS VSS
USBN0 VSS_ VDD_ RTCX_ _F
USB RTC IN
RTCX_ INTRUD SMBUS SMBUS _G
OUT ER#
C
D
SLP PWR EXT PME# _H
BTN# BTN# SMI#
PWR PWR VDD_ STRAP _J
ON# GD AUX H1
STRAP RPWR PCI
H0
ON RST#
RI# _K
VDD3 STRAP DC STRAP _L
L1 STOP# H2
SMI# A20M # SUS FLAG _M
PEND# RD#
STP WSC# CPU ROM_ _N
CLK#
RST# KBCS#
SER PCI CPU CACHE _P
IRQ STOP# STOP# _ZZ
INTR NMI PICD1# PICD0# _R
T ^{LFRAME GPIO31 SA10 SA11}
#
PIC IGNNE# FERR # INIT# _T
CLK#
U ^{LDRQ0# GPIO30 SA9 VDD3 IRQ7 SA7 SA6 SA5 SA4 SA3 VDD3 DDATA DDATA DDATA DDATA DDATA VDD3 DADDR THERM OSC} U
S7
S5 S12 S13 S14
P0
#
V ^{LDRQ1# BCLK SA8 IRQ6 IRQ5 IRQ4 IRQ3 FLAG GPIO27 INT SPKR DDATA DDATA DDATA DDATA DDATA DDATA DADDR DCS1S# C32} V
WR
IRQ8#
S6
S4
S3
S2
S1
S15
P2
KHZ
W ^{GPIO24 DDATA DDATA DDATA DDATA DDATA DDATA DDATA DDATA DDATA DDATA DDRQS DIOW DIOR DRDYS DDACK DADDR DADDR DCS1P# DCS3S#} W
P8
S8
P6 P10 S10 P4 P12 P13 P14 P15
S#
S#
S#
S1
S0
Y ^{ISA DDATA DDATA DDATA DDATA DDATA DDATA DDATA DDATA DDATA DDATA DDRQP DIOW DIOR DRDYP DDACK DADDR DDATA DADDR DCS3P#} Y
BIOS P7
P9
S9
P5 P11 S11 P3
P2
P1
P0
P#
P#
P#
P1
S0
S2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
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