AMD-766 Datasheet, PDF (26/96 Pages) Advanced Micro Devices – Peripheral Bus Controller

23167B – March 2001
Preliminary Information
AMD-766^TM Peripheral Bus Controller Data Sheet
Snoop-disabled clock control (C3). In C3, the processor is placed into the stop-grant state such that the processor’s
cache cannot be snooped; PCI master requests result in resume events (see PM04[BM_RLD]). Signal control during
C3 is specified by C3A50.
Full on (FON). In FON, all the power planes are powered and the processor is not in the stop-grant state.
The following figure shows the system power state transitions.
STR
suspend to RAM
PWRON# high
RPWRON high
SOFF/STD
soft off; suspend to
disk
PWRON# high
RPWRON low
Resume event
CPU initiated (PM04)
Resume event
CPU initiated (PM04),
PORTCF9[FULLRST],
or power button override
FON
full on
PWRON#,
RPWRON
asserted
CPU initiated (PM14)
Resume event
CPU initiated (PM15)
Resume event
VDD_AUX power applied
and C3A43[G3TOS5]=1
CPU initiated (PM04)
Resume event
MOFF
mechanical off
Power
failure
VDD_AUX power applied
and C3A43[G3TOS5]=0
C2
Stop-grant
condition; see
C3A50
C3
C2 plus clock
control; see
C3A50
POS
clock-control
based power
reduction and
sleep state; see
C3A50
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