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| AMD-766 Datasheet, PDF (24/96 Pages) Advanced Micro Devices – Peripheral Bus Controller | |||
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23167B â March 2001
Preliminary Information
AMD-766TM Peripheral Bus Controller Data Sheet
4.6.1.1 SCI And SMI Control
System management events cause corresponding STS registers to be set. STS registers may be enabled to generate
SCI and SMI interrupts. The following diagram shows how the STS registers are routed to the interrupts.
Hardware
Traps
PM[8C:40]
SMBus
Events
PM20 Events
GPIO pins
PM[FF:F4],
PM[D3:C0]
PM00 Events
Miscellaneous
SMIs
LPT, USB
Events
PMA8/AC
STS register
EN register
PME0/E2
STS register
EN register
PM20/22/2A
STS register
EN register
SMI_EN register
PMD4/D8
STS register
EN register
PM00/02
STS register
EN register
PM30/32
STS register
EN register
PM24/25
STS register
EN register
AND-
OR
AND-
OR
AND-
OR
AND-
OR
EN register
PM2A
EN register
PM2A
AND-
OR
AND-
OR
AND-
OR
EN register
PM2A
EN register
PM2A
AND-
OR
EN register
PM2A
PM04[SCI_EN]
OR
1
SCI
0
OR
OR
SMI
PM2C[SMI_EN]
Serial
IRQ
SMI
output
USB
keyboard
emulation
interrupt
The âAND-ORâ boxes in the middle of the diagram specify the logical AND of the STS and EN registers (or STS
and SMI_EN registers, as the case may be) the results of which are logically ORed together; for example: (STS1 &
EN1) | (STS2 & EN2)... All enabled ACPI interrupts may be routed to either SCI or SMI interrupts by
PM04[SCI_EN]. Or these STS registers may be routed directly to SMI through the SMI_EN registers, regardless of
the state of PM04[SCI_EN]. The USB controller and serial IRQ logic also provide sources of SMI that is ORed into
the logic. SMI and SCI are inputs to the interrupt logic; see section 4.3.4.
4.6.1.2 Traps
Configuration registers C3A[D8:A0] specify several traps for programmable memory and IO space address ranges.
PMA8 provides the status registers for these and several fixed-address traps. These traps are generated for the
specified transactions that are presented to the host PCI bus. They may be enabled to generate ACPI interrupts
through PMAC or SMI interrupts through PM2A.
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