AMD-766 Datasheet, PDF (54/96 Pages) Advanced Micro Devices – Peripheral Bus Controller

23167B – March 2001
Preliminary Information
AMD-766^TM Peripheral Bus Controller Data Sheet
5.5 Enhanced IDE Controller IO Registers
These registers are in IO space. The base address register is C1A20. See section 5.1.2 for a description of the
register naming convention.
These registers comply with SFF 8038i for control of DMA transfers between drives and system memory.
IBM0: Primary Bus Master IDE Command Register
IO mapped (base pointers: C1A20); offset: 00h. Default: 00h.
7:0
PCMD
PCMD[0] Start/Stop Bus Master, STSP. Write 1 only. Reads always return zero.
PCMD[2:1]. Reserved.
PCMD[3] Read or Write Control, RW. Read-write. 1=Read cycles specified (read from the drive; write to system
memory). 0=Write cycles specified.
PCMD[7:4]. Reserved.
IBM2: Primary Bus Master IDE Status Register
IO space (base pointers: C1A20); offset: 02h. Default: 00h.
7:0
PSTAT
PSTAT[0] Bus Master IDE Active, ACTV. Read only.
PSTAT[1] Error, ERR. Read; set by hardware; write 1 to clear.
PSTAT[2] Interrupt, IRQ. Read; set by hardware; write 1 to clear. This bit is set by the rising edge of the IDE
interrupt line.
PSTAT[4:3]. Reserved.
PSTAT[5] Drive 0 DMA Capable, DMA0C. Read-write.
PSTAT[6] Drive 1 DMA Capable, DMA1C. Read-write.
PSTAT[7] Simplex Only. Read only.
IBM4: Primary Bus Master IDE PRD Table Address Register
IO space (base pointers: C1A20); offset: 07-04h. Default: 0000 0000h.
31:2
PPRDADD
PPRDADD[1:0]. Read only. These bits are fixed in the low state
PPRDADD[31:2] Primary physical region descriptor table base address, PRDADD. Read-write.
1:0
Reserved
IBM8: Secondary Bus Master IDE Command Register
IO space (base pointers: C1A20); offset: 08h. Default: 00h.
7:0
SCMD
SCMD[0] Start/Stop Bus Master, STSP. Write 1 only. Reads always return zero.
SCMD[2:1]. Reserved.
SCMD[3] Read or Write Control, RW. Read-write. 1=Read cycles specified (read from the drive; write to system
memory).
SCMD[7:4]. Reserved.
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