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EP2SGX130GF1508C4 Datasheet, PDF (310/316 Pages) Altera Corporation – Section I. Stratix II GX Device Data Sheet | |||
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Table 4â118. Document Revision History (Part 4 of 5)
Date and
Document
Version
Changes Made
Summary of Changes
June 2006, v4.0
â Updated Table 6â5.
â Updated Table 6â6.
â Updated all values in Table 6â7.
â Added Tables 6â8 and 6â9.
â Added Figures 6â1 through 6â4.
â Updated Table 6â18.
â Updated Tables 6â85 through 6â96.
â Added Table 6â80, Stratix II GX Maximum
Output Clock Rate for Dedicated Clock Pins.
â Updated Table 6â100.
â In âI/O Timing Measurement Methodologyâ
section, updated Table 6â42.
â In âInternal Timing Parametersâ section,
updated Tables 6â43 through 6â48.
â In âStratix II GX Clock Timing Parametersâ
section, updated Tables 6â50 through 6â65.
â In âIOE Programmable Delayâ section, updated
Tables 6â67 and 6â68.
â In âI/O Delaysâ section, updated Tables 6â71
through 6â74.
â In âMaximum Input & Output Clock Toggle Rateâ
section, updated Tables 6â75 through 6â83.
â In âDCD Measurement Techniquesâ section,
updated Tables 6â85 through 6â92.
â In âHigh-Speed I/O Specificationsâ section,
updated Tables 6â94 through 6â96.
â In âExternal Memory Interface Specificationsâ
section, updated Table 6â100.
â Removed rows for VI D, VO D, VI C M ,
and VO C M from Table 6â5.
â Updated values for rx, tx, and
refclkb in Table 6â6.
â Removed table containing 1.2-V
PCML I/O information. That
information is in Table 6â7.
â Added values to Table 6â100.
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