EP2SGX130GF1508C4 Datasheet, PDF (243/316 Pages) Altera Corporation – Section I. Stratix II GX Device Data Sheet

DC and Switching Characteristics
Table 4–59. M512 Block Internal Timing Microparameters (Part 2 of 2)
Symbol
t_M512CLR
Parameter
Minimum clear
pulse width
-3 Speed
Grade(2)
Min Max
144
-3 Speed Grade
(3)
-4 Speed Grade
-5 Speed Grade
Unit
Min Max Min Max Min Max
151
160
192
ps
(1) The M512 block f_MAX obtained using the Quartus II software does not necessarily equal to 1/TM512RC.
(2) This column refers to –3 speed grades for EP2SGX30, EP2SGX60, and EP2SGX90 devices.
(3) This column refers to –3 speed grades for EP2SGX130 devices.
Table 4–60. M4K Block Internal Timing Microparameters (Part 1 of 2) Note (1)
Symbol
Parameter
-3 Speed Grade
(2)
-3 Speed Grade
(3)
-4 Speed Grade
-5 Speed Grade
Unit
Min Max Min Max Min Max Min Max
t_M4KRC
Synchronous
read cycle time
1462 2240 1462 2351 1462 2500 1462 3000 ps
t_M4KWERESU Write or read
22
23
24
29
ps
enable setup
time before clock
t_M4KWEREH
Write or read
203
213
226
272
ps
enable hold time
after clock
t_M4KBESU
Byte enable
22
23
24
29
ps
setup time before
clock
t_M4KBEH
Byte enable hold 203
213
226
272
ps
time after clock
t_M4KDATAASU A port data setup 22
23
24
29
ps
time before clock
t_M4KDATAAH A port data hold 203
213
226
272
ps
time after clock
t_M4KADDRASU A port address
22
23
24
29
ps
setup time before
clock
t_M4KADDRAH A port address
203
213
226
272
ps
hold time after
clock
t_M4KDATABSU B port data setup 22
23
24
29
ps
time before clock
Altera Corporation
June 2009
4–73
Stratix II GX Device Handbook, Volume 1