EP2SGX130GF1508C4 Datasheet, PDF (213/316 Pages) Altera Corporation – Section I. Stratix II GX Device Data Sheet

DC and Switching Characteristics
Table 4–23. Stratix II GX Device DC Operating Conditions (Part 2 of 2) Note (1)
Symbol
Parameter
Conditions
R_CONF
(4)
Value of I/O pin pull-up
resistor before and
during configuration
Vi = 0, V_CCIO =
3.3 V
Vi = 0, V_CCIO =
2.5 V
Vi = 0, V_CCIO =
1.8 V
Vi = 0, V_CCIO =
1.5 V
Vi = 0, V_CCIO =
1.2 V
Recommended value of
I/O pin external
pull-down resistor
before and during
configuration
Device
Minimum Typical Maximum Unit
10
25
50
KOhm
15
35
70
KOhm
30
50
100 KOhm
40
75
150 KOhm
50
90
170 KOhm
1
2
KOhm
Notes to Table 4–23:
(1) Typical values are for T_A = 25 °C, V_CCINT = 1.2 V, and V_CCIO = 1.5 V, 1.8 V, 2.5 V, and 3.3 V.
(2) This value is specified for normal device operation. The value may vary during power-up. This applies for all V_CCIO
settings (3.3, 2.5, 1.8, and 1.5 V).
(3) Maximum values depend on the actual TJ and design utilization. See PowerPlay Early Power Estimator (EPE) and
Power Analyzer or the Quartus II PowerPlay Power Analyzer and Optimization Technology (available at www.altera.com)
for maximum values. See the section “Power Consumption” on page 4–59 for more information.
(4) Pin pull-up resistance values will lower if an external source drives the pin higher than V_CCIO.
I/O Standard Specifications
Tables 4–24 through 4–47 show the Stratix II GX device family I/O
standard specifications.
Table 4–24. LVTTL Specifications (Part 1 of 2)
Symbol
V_CCIO (1)
V_IH
V_IL
V_OH
Parameter
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Conditions
I_OH = –4 mA (2)
Minimum
3.135
1.7
–0.3
2.4
Maximum Unit
3.465
V
4.0
V
0.8
V
V
Altera Corporation
June 2009
4–43
Stratix II GX Device Handbook, Volume 1