EP2SGX130GF1508C4 Datasheet, PDF (24/316 Pages) Altera Corporation – Section I. Stratix II GX Device Data Sheet

Transceivers
Figure 2–13. Programmable Receiver Termination
50, 60, or 75 Ω
50, 60, or 75 Ω
V_CM
Differential
Input
Buffer
If a design uses external termination, the receiver must be externally
terminated and biased to 0.85 V or 1.2 V. Figure 2–14 shows an example
of an external termination and biasing circuit.
Figure 2–14. External Termination and Biasing Circuit
50/60/75-Ω
Termination
Resistance
Receiver External Termination
and Biasing
V_DD
R1
C1
R1/R2 = 1K
V_DD × {R2/(R1 + R 2)} = 0.85/1.2 V R2
Stratix II GX Device
Receiver
RXIP
RXIN
Receiver External Termination
and Biasing
Transmission
Line
Programmable Equalizer
The Stratix II GX receivers provide a programmable receive equalization
feature to compensate the effects of channel attenuation for high-speed
signaling. PCB traces carrying these high-speed signals have low-pass
filter characteristics. The impedance mismatch boundaries can also cause
signal degradation. The equalization in the receiver diminishes the lossy
attenuation effects of the PCB at high frequencies.
2–16
Stratix II GX Device Handbook, Volume 1
Altera Corporation
October 2007