EP2SGX130GF1508C4 Datasheet, PDF (155/316 Pages) Altera Corporation – Section I. Stratix II GX Device Data Sheet

Stratix II GX Architecture
Table 2–42. Document Revision History (Part 5 of 6)
Date and
Document
Version
Changes Made
Summary of Changes
Previous Chapter
02 changes:
June 2006, v1.2
● Updated notes 1 and 2 in Figure 2–1.
Updated input frequency range in
● Updated “Byte Serializer” section.
Table 2–4.
● Updated Tables 2–4, 2–7, and 2–16.
● Updated “Programmable Output Driver”
section.
● Updated Figure 2–12.
● Updated “Programmable Pre-Emphasis”
section.
● Added Table 2–11.
● Added “Dynamic Reconfiguration” section.
● Added “Calibration Block” section.
● Updated “Programmable Equalizer”
section, including addition of Figure 2–18.
Previous Chapter
02 changes:
April 2006, v1.1
Previous Chapter
02 changes:
October 2005
v1.0
● Updated Figure 2–3.
● Updated Figure 2–7.
● Updated Table 2–4.
● Updated “Transmit Buffer” section.
Added chapter to the Stratix II GX Device
Handbook.
Updated input frequency range in
Table 2–4.
Previous Chapter ● Updated Table 3–18 with note.
03 changes:
August 2006, v1.4
Previous Chapter ● Updated note 2 in Figure 3–41.
03 changes:
● Updated column title in Table 3–21.
June 2006, v1.3
Previous Chapter
03 changes:
April 2006, v1.2
● Updated note 1 in Table 3–9.
● Updated note 1 in Figure 3–40.
● Updated note 2 in Figure 3–41.
● Updated Table 3–16.
● Updated Figure 3–56.
● Updated Tables 3–19 through 3–22.
● Updated Tables 3–25 and 3–26.
● Updated “Fast PLL & Channel Layout”
section.
Added 1,152-pin FineLine BGA package
information for EP2SGX60 device in
Table 3–16.
Altera Corporation
October 2007
2–147
Stratix II GX Device Handbook, Volume 1