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EP2SGX130GF1508C4 Datasheet, PDF (151/316 Pages) Altera Corporation – Section I. Stratix II GX Device Data Sheet | |||
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Stratix II GX Architecture
â Stratix II Performance and Logic Efficiency Analysis White Paper
â TriMatrix Embedded Memory Blocks in Stratix II & Stratix II GX Devices
chapter in volume 2 of the Stratix II GX Device Handbook
Document
Table 2â42 shows the revision history for this chapter.
Revision History
Table 2â42. Document Revision History (Part 1 of 6)
Date and
Document
Version
Changes Made
October 2007,
v2.2
Updated:
â âProgrammable Pull-Up Resistorâ
â âReverse Serial Pre-CDR Loopbackâ
â âReceiver Input Bufferâ
â âPattern Detectionâ
â âControl and Status Signalsâ
â âIndividual Power Down and Reset for the
Transmitter and Receiverâ
Updated:
â Figure 2â14
â Figure 2â26
â Figure 2â27
â Figure 2â86 (notes only)
â Figure 2â87
Updated:
â Table 2â4
â Table 2â7
Removed note from Table 2â31.
Removed Tables 2-2, 2-7, and 2-8.
Minor text edits.
August 2007, v2.1 Added âReverse Serial Pre-CDR Loopbackâ
section.
Updated Table 2â2.
Added âReferenced Documentsâ section.
Summary of Changes
Altera Corporation
October 2007
2â143
Stratix II GX Device Handbook, Volume 1
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