DS077 Datasheet, PDF(59/108 Page) Xilinx, Inc – Product Availability

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DS077 Datasheet, PDF (59/108 Pages) Xilinx, Inc – Product Availability

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R

Spartan-IIE FPGA Family: Pinout Tables

TQ144 Pinouts (XC2S50E and XC2S100E)

(Continued)

Pad Name

Function Bank Pin

LVDS

Async.

Output

Option

VREF

Option

I/O (DLL), L17P 4 P56

-

-

I/O

4 P57

-

-

I/O, VREF

4 P58

-

All

Bank 4

I/O, L16N_YY

4 P59

All

-

I/O, L16P_YY

4 P60

All

-

VCCINT

- P61

-

-

GND

- P62

-

-

I/O, L15N_YY

4 P63

All

-

I/O, L15P_YY

4 P64

All

XC2S100E

I/O

4 P65

-

-

I/O, VREF

4 P66

-

All

Bank 4

I/O

4 P67

-

-

I/O, L14N_YY

4 P68

All

-

I/O, L14P_YY

4 P69

All

-

GND

- P70

-

-

DONE

3 P71

-

-

VCCO

- P72

-

-

PROGRAM

- P73

-

-

I/O (INIT),

3 P74

All

-

L13N_YY

I/O (D7),

3 P75

All

-

L13P_YY

I/O

3 P76

-

-

I/O, VREF

3 P77

-

All

Bank 3

I/O

3 P78

-

-

I/O, L12N

3 P79 XC2S50E XC2S100E

I/O (D6), L12P 3 P80 XC2S50E

-

GND

- P81

-

-

I/O (D5),

3 P82

All

-

L11N_YY

I/O, L11P_YY

3 P83

All

-

I/O

3 P84

-

-

TQ144 Pinouts (XC2S50E and XC2S100E)

(Continued)

Pad Name

Function Bank Pin

LVDS

Async.

Output

Option

VREF

Option

I/O, VREF

3 P85 XC2S50E

All

Bank 3, L10N

I/O (D4), L10P 3 P86 XC2S50E

-

I/O

3 P87

-

-

VCCINT

- P88

-

-

I/O (TRDY)

3 P89

-

-

VCCO

- P90

-

-

GND

- P91

-

-

I/O (IRDY)

I/O

I/O (D3), L9N

I/O, VREF

Bank 2, L9P

I/O

I/O, L8N_YY

I/O (D2),

L8P_YY

GND

I/O (D1), L7N

I/O, L7P

I/O

I/O, VREF

Bank 2

I/O

I/O (DIN, D0),

L6N_YY

I/O (DOUT,

BUSY),

L6P_YY

CCLK

VCCO

TDO

GND

TDI

2 P92

-

-

2 P93

-

-

2 P94 XC2S50E

-

2 P95 XC2S50E

All

2 P96

-

-

2 P97

All

-

2 P98

All

-

- P99

-

-

2 P100 XC2S50E

-

2 P101 XC2S50E XC2S100E

2 P102

-

-

2 P103

-

All

2 P104

-

-

2 P105

All

-

2 P106

All

-

2 P107

-

-

- P108

-

-

2 P109

-

-

- P110

-

-

- P111

-

-

DS077-4 (2.3) June 18, 2008

www.xilinx.com

59

Product Specification

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