DS077 Datasheet, PDF (14/108 Pages) Xilinx, Inc – Product Availability

Spartan-IIE FPGA Family: Functional Description
R
COUT
YB
Y
G4
I4
Look-Up
S
D
Q
YQ
G3
I3 ^Table
Carry
O
and
CK
G2
I2
Control
Logic
EC
G1
I1
R
F5IN
BY
SR
F4
F3
F2
F1
I4
Look-Up
I3 ^Table
O
I2
I1
Carry
and
Control
Logic
XB
X
S
D
Q
XQ
CK
EC
R
BX
CIN
CLK
CE
DS001_04_091400
Figure 6: Spartan-IIE CLB Slice (two identical slices in each CLB)
Additional Logic
The F5 multiplexer in each slice combines the function gen-
erator outputs (Figure 7). This combination provides either
a function generator that can implement any 5-input func-
tion, a 4:1 multiplexer, or selected functions of up to nine
inputs.
Similarly, the F6 multiplexer combines the outputs of all four
function generators in the CLB by selecting one of the two
F5-multiplexer outputs. This permits the implementation of
any 6-input function, an 8:1 multiplexer, or selected func-
tions of up to 19 inputs.
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DS077-2 (v2.3) June 18, 2008
Product Specification