DS077 Datasheet, PDF (48/108 Pages) Xilinx, Inc – Product Availability

Spartan-IIE FPGA Family: DC and Switching Characteristics
TBUF Switching Characteristics
Symbol
T_IO
T_OFF
T_ON
Description
IN input to OUT output
TRI input to OUT output high impedance
TRI input to valid data on OUT output
JTAG Test Access Port Switching Characteristics
Symbol
Description
Setup/Hold Times with Respect to TCK
T_TAPTCK / T_TCKTAP TMS and TDI setup times and hold times
Sequential Delays
T_TCKTDO
FTCK
Output delay from clock TCK to output TDO
TCK clock frequency
Configuration Switching Characteristics
R
Speed Grade
-7
-6
Max
Max
0
0
0.1
0.11
0.1
0.11
Units
ns
ns
ns
Speed Grade
-7
-6
Min
Max
Min
Max
Units
4.0 / 2.0
-
4.0 / 2.0
-
ns
-
11.0
-
11.0
ns
-
33
-
33
MHz
V_CC⁽¹⁾
T_POR
PROGRAM
INIT
T_PL
CCLK Output or Input
T_ICCK
M0, M1, M2
(Required)
Valid
Symbol
T_POR
T_PL
T_ICCK
T_PROGRAM
Description
Power-on reset
Program latency
CCLK output delay (Master serial
mode only)
Program pulse width
DS001_12_102301
.
All Devices
Min
Max
Units
-
2
ms
-
100
μs
0.5
4
μs
300
-
ns
Notes:
1. Before configuration can begin, V_CCINT and V_CCO Bank 2 must reach the recommended operating voltage.
Figure 23: Configuration Timing on Power-Up
48
www.xilinx.com
DS077-3 (v2.3) June 18, 2008
Product Specification