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DS077 Datasheet, PDF (105/108 Pages) Xilinx, Inc – Product Availability
R
Spartan-IIE FPGA Family: Pinout Tables
FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
Pad Name
Function
Bank Pin
LVDS Async.
Output Option
VREF
Option
I/O, L14N_YY
0 E10
All
-
I/O
0 G10
-
-
I/O, L13P
0
A9
XC2S600E
-
I/O, L13N
0
B9
XC2S600E
-
I/O
0 H10
-
-
I/O, L12P_YY
0
C9
All
-
I/O, L12N_YY
0
D9
All
-
I/O
0
E9
-
-
I/O, VREF Bank 0,
0
F9
-
All
L11P
I/O, L11N
0
G9
-
-
I/O, L10P
0
A8
-
-
I/O, L10N
0
B8
-
-
I/O
0
H9
-
-
I/O, L9P
0
E8
XC2S600E
-
I/O, L9N
0
F8
XC2S600E XC2S600E
I/O, L8P
0
A7
XC2S600E
-
I/O, L8N
0
B7
XC2S600E
-
I/O
0
G8
-
-
I/O, L7P_YY
0
C7
All
-
I/O, L7N_YY
0
D7
All
-
I/O
0
E7
-
-
I/O, L6P_YY
0
F7
All
-
I/O, VREF Bank 0,
0
G7
All
All
L6N_YY
I/O
0
A6
-
-
I/O, L5P
0
B6
-
-
I/O, L5N
0
C6
-
-
I/O, L4P
0
D6
-
-
I/O, L4N
0
E6
-
-
I/O
0
F6
-
-
I/O, L3P_YY
0
A5
All
-
I/O, VREF Bank 0,
0
B5
All
All
L3N_YY
I/O, L2P_YY
0
D5
All
-
Device-Specific Pinouts
XC2S400E
XC2S600E
I/O, L14N_YY
I/O, L14N_YY
-
I/O
I/O, L13P
I/O, L13P_Y
I/O, L13N
I/O, L13N_Y
-
I/O
I/O, L12P_YY
I/O, L12P_YY
I/O, L12N_YY
I/O, L12N_YY
I/O
I/O
I/O, VREF Bank 0,
L11P
I/O, VREF Bank 0,
L11P
I/O, L11N
I/O, L11N
I/O, L10P
I/O, L10P
I/O, L10N
I/O, L10N
I/O
I/O
I/O
I/O, L9P_Y
-
I/O, VREF Bank 0,
L9N_Y
I/O, L8P
I/O, L8P_Y
I/O, L8N
I/O, L8N_Y
I/O
I/O
I/O, L7P_YY
I/O, L7P_YY
I/O, L7N_YY
I/O, L7N_YY
-
I/O
I/O, L6P_YY
I/O, L6P_YY
I/O, VREF Bank 0,
L6N_YY
I/O, VREF Bank 0,
L6N_YY
I/O
I/O
I/O, L5P
I/O, L5P
I/O, L5N
I/O, L5N
I/O, L4P
I/O, L4P
I/O, L4N
I/O, L4N
-
I/O
I/O, L3P_YY
I/O, L3P_YY
I/O, VREF Bank 0,
L3N_YY
I/O, VREF Bank 0,
L3N_YY
I/O, L2P_YY
I/O, L2P_YY
DS077-4 (2.3) June 18, 2008
www.xilinx.com
105
Product Specification