DS90UB914A-Q1 Datasheet, PDF (9/61 Pages) Texas Instruments – 25-MHz to 100-MHz 10/12-Bit FPD-Link III Deserializer

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DS90UB914A-Q1
SNLS499A – APRIL 2016 – REVISED JUNE 2016
Electrical Characteristics^(1)(2)(3) (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
CML RECEIVER DC SPECIFICATIONS (RIN0+,RIN0–,RIN1+,RIN1– )
I_IN
Input Current
V_IN = V_DD or 0 V, V_DD = 1.89 V,
Differential Internal
Termination Resistance
Differential across RIN+ and RIN–
R_T
Single-ended
Termination Resistance
RIN+ or RIN–
–20
1
80
100
40
50
V_ID
Differential Input Voltage Back Channel Disabled, (Figure 3)
210
V_IN
Single-Ended Input
Voltage
Back Channel Disabled, (Figure 3)
105
V_OD-BC
Back Channel Differential
Output Voltage
350
V_OUT-BC
Back Channel Single-
Ended Output Voltage
175
CML MONITOR OUTPUT DRIVER SPECIFICATIONS(CMLOUTP, CMLOUTN)
E_w
Differential Output
Eye Opening⁽⁴⁾
R_L = 100 Ω
0.45
E_H
Differential Output
Eye Height
Jitter Frequency > f/40 (Figure 8)
200
(4) UI – Unit Interval is equivalent to one ideal serialized data bit width. The UI scales with PCLK frequency.
10-bit mode: 1 UI = 1 / ( PCLK_Freq. /2 x 28 )
12-bit HF mode: 1 UI = 1 / ( PCLK_Freq. x 2/3 x 28 )
12-bit LF mode: 1 UI = 1 / ( PCLK_Freq. x 28 )
MAX UNIT
20 µA
120
Ω
60
mV
mV
540 mV
270 mV
UI
mV
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