DS90UB914A-Q1 Datasheet, PDF (47/61 Pages) Texas Instruments – 25-MHz to 100-MHz 10/12-Bit FPD-Link III Deserializer

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DS90UB914A-Q1
SNLS499A – APRIL 2016 – REVISED JUNE 2016
9.2 Typical Applications
9.2.1 Coax Application
Image
Sensor
Camera Unit
Camera Data
10 or 12
DATA
HSYNC
VSYNC
Pixel Clock
4
GPO[3:0]
SDA
SCL
DS90UB913AQ
Serializer
FPD-Link III
DS90UB914AQ
Deserializer
DIN[11:0] or
DIN[9:0]
HSYNC,
VSYNC
PCLK
DOUT+
RIN+
DOUT- _50Q
50Q
RIN-
Bi-Directional
Control Channel
ROUT[11:0]
or
ROUT[9:0]
HSYNC,
VSYNC
PCLK
GPO[3:0]
GPIO[3:0]
SDA
SCL
SDA
SCL
Camera Data
10 or 12
DATA
HSYNC
VSYNC
Pixel Clock
4
GPIO[3:0]
SDA
SCL
ECU Module
Microcontroller
Copyright © 2016, Texas Instruments Incorporated
Figure 32. Coax Application Block Diagram
9.2.1.1 Design Requirements
For the typical coax design applications, use the following as input parameters:
Table 9. Coax Design Parameters
DESIGN PARAMETER
V_DDIO
V_{DD_n}
AC Coupling Capacitors for RIN±
PCLK Frequency
EXAMPLE VALUE
1.8 V or 3.3 V
1.8 V
0.1 µF, 0.047 µF (For the unused data pin, RIN– )
50 MHz (12-bit low frequency), 75 MHz (12-bit high frequency), 100
MHz (10-bit)
Copyright © 2016, Texas Instruments Incorporated
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