SM320F28335-EP_12 Datasheet, PDF (87/167 Pages) Texas Instruments – Digital Signal Controller (DSC)

SM320F28335-EP
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SPRS581D – JUNE 2009 – REVISED MAY 2012
The SPI port operation is configured and controlled by the registers listed in Table 4-13.
Table 4-13. SPI-A Registers
NAME
ADDRESS
SIZE (X16)
DESCRIPTION ⁽¹⁾
SPICCR
0x7040
1
SPI-A Configuration Control Register
SPICTL
0x7041
1
SPI-A Operation Control Register
SPISTS
0x7042
1
SPI-A Status Register
SPIBRR
0x7044
1
SPI-A Baud Rate Register
SPIRXEMU
0x7046
1
SPI-A Receive Emulation Buffer Register
SPIRXBUF
0x7047
1
SPI-A Serial Input Buffer Register
SPITXBUF
0x7048
1
SPI-A Serial Output Buffer Register
SPIDAT
0x7049
1
SPI-A Serial Data Register
SPIFFTX
0x704A
1
SPI-A FIFO Transmit Register
SPIFFRX
0x704B
1
SPI-A FIFO Receive Register
SPIFFCT
0x704C
1
SPI-A FIFO Control Register
SPIPRI
0x704F
1
SPI-A Priority Control Register
(1) Registers in this table are mapped to Peripheral Frame 2. This space only allows 16-bit accesses. 32-bit accesses produce undefined
results.
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Peripherals
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