SM320F28335-EP_12 Datasheet, PDF(110/167 Page) Texas Instruments

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SM320F28335-EP_12 Datasheet, PDF (110/167 Pages) Texas Instruments – Digital Signal Controller (DSC)

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SM320F28335-EP

SPRS581D â JUNE 2009 â REVISED MAY 2012

www.ti.com

XCLKIN(A)

C10

XCLKOUT(B)

A. The relationship of XCLKIN to XCLKOUT depends on the divide factor chosen. The waveform relationship shown is

intended to illustrate the timing parameters only and may differ based on actual configuration.

B. XCLKOUT configured to reflect SYSCLKOUT.

Figure 6-6. Clock Timing

6.8 Power Sequencing

No requirements are placed on the power up/down sequence of the various power pins to ensure the

correct reset state for all the modules. However, if the 3.3-V transistors in the level shifting output buffers

of the I/O pins are powered prior to the 1.9-V transistors, it is possible for the output buffers to turn on,

causing a glitch to occur on the pin during power up. To avoid this behavior, power the VDD pins prior to or

simultaneously with the VDDIO pins, ensuring that the VDD pins have reached 0.7 V before the VDDIO pins

reach 0.7 V.

There are some requirements on the XRS pin:

1. During power up, the XRS pin must be held low for tw(RSL1) after the input clock is stable (see Table 6-

10). This is to enable the entire device to start from a known condition.

2. During power down, the XRS pin must be pulled low at least 8 Î¼s prior to VDD reaching 1.5 V. This is to

enhance flash reliability.

Additionally it is recommended that no voltage larger than a diode drop (0.7 V) should be applied to any

pin prior to powering up the device. Voltages applied to pins on an unpowered device can bias internal P-

N junctions in unintended ways and produce unpredictable results.

6.8.1 Power Management and Supervisory Circuit Solutions

Table 6-9 lists the power management and supervisory circuit solutions for 2833x/2823x devices. LDO

selection depends on the total power consumed in the end application. Go to www.ti.com and click on

Power Management for a complete list of TI power ICs or select the Power Management Selection Guide

link for specific power reference designs.

Table 6-9. Power Management and Supervisory Circuit Solutions

SUPPLIER

Texas Instruments

TYPE

LDO

SVS

LDO

DC/DC

PART

TPS767D301

TPS70202

TPS766xx

TPS3808

TPS3803

TPS799xx

TPS736xx

TPS62110

TPS6230x

DESCRIPTION

Dual 1-A low-dropout regulator (LDO) with supply voltage supervisor (SVS)

Dual 500/250-mA LDO with SVS

250-mA LDO with PG

Open Drain SVS with programmable delay

Low-cost Open-drain SVS with 5 Î¼S delay

200-mA LDO in WCSP package

400-mA LDO with 40 mV of VDO

High Vin 1.2-A dc/dc converter in 4x4 QFN package

500-mA converter in WCSP package

110 Electrical Specifications

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