SM320F28335-EP_12 Datasheet, PDF (44/167 Pages) Texas Instruments – Digital Signal Controller (DSC)

SM320F28335-EP
SPRS581D – JUNE 2009 – REVISED MAY 2012
Table 3-7. Peripheral Frame 2 Registers
NAME
System Control Registers
SPI-A Registers
SCI-A Registers
External Interrupt Registers
ADC Registers
SCI-B Registers
SCI-C Registers
I2C-A Registers
ADDRESS RANGE
0x00 7010 - 0x00 702F
0x00 7040 - 0x00 704F
0x00 7050 - 0x00 705F
0x00 7070 - 0x00 707F
0x00 7100 - 0x00 711F
0x00 7750 - 0x00 775F
0x00 7770 - 0x00 777F
0x00 7900 - 0x00 793F
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SIZE (×16)
32
16
16
16
32
16
16
64
Table 3-8. Peripheral Frame 3 Registers
NAME
ADDRESS RANGE
SIZE (×16)
McBSP-A Registers (DMA)
0x5000 – 0x503F
64
McBSP-B Registers (DMA)
EPWM1 + HRPWM1 (DMA)⁽¹⁾
0x5040 - 0x507F
64
0x5800 – 0x583F
64
EPWM2 + HRPWM2 (DMA)
0x5840 - 0x587F
64
EPWM3 + HRPWM3 (DMA)
0x5880 - 0x58BF
64
EPWM4 + HRPWM4 (DMA)
0x58C0 - 0x58FF
64
EPWM5 + HRPWM5 (DMA)
0x5900 - 0x593F
64
EPWM6 + HRPWM6 (DMA)
0x5940 - 0x597F
64
(1) The ePWM/HRPWM modules can be re-mapped to Peripheral Frame 3 where they can be accessed by the DMA module. To achieve
this, bit 0 (MAPEPWM) of MAPCNF register (address 0x702E) must be set to 1. This register is EALLOW protected. When this bit is 0,
the ePWM/HRPWM modules are mapped to Peripheral Frame 1.
3.4 Device Emulation Registers
These registers are used to control the protection mode of the C28x CPU and to monitor some critical
device signals. The registers are defined in Table 3-9.
Table 3-9. Device Emulation Registers
NAME
DEVICECNF
PARTID
CLASSID
REVID
PROTSTART
PROTRANGE
ADDRESS
RANGE
0x0880
0x0881
0x380090
0x0882
0x0883
0x0884
0x0885
SIZE (x16)
DESCRIPTION
2
Device Configuration Register
1
Part ID Register 0x00EF
1
0x00EF
1
Revision ID
Register
0x0000 - Silicon Rev. 0 - TMX
0x0001 – Silicon Rev. A – TMS
1
Block Protection Start Address Register
1
Block Protection Range Address Register
44
Functional Overview
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