SM320F28335-EP_12 Datasheet, PDF (158/167 Pages) Texas Instruments – Digital Signal Controller (DSC)

SM320F28335-EP
SPRS581D – JUNE 2009 – REVISED MAY 2012
www.ti.com
Table 6-66. Flash Parameters at 150-MHz SYSCLKOUT (continued)
PARAMETER
TEST
CONDITIONS
MIN
TYP
I_DD3VFLP ⁽¹⁾
V_DD3VFL current consumption during the Erase/Program Erase
75
cycle
Program
35
I_DDP ⁽¹⁾
V_DD current consumption during Erase/Program cycle
180
I_DDIOP ⁽¹⁾
V_DDIO current consumption during Erase/Program cycle
20
(1) Typical parameters as seen at room temperature including function call overhead, with all peripherals off.
Table 6-67. Flash/OTP Access Timing
MAX
UNIT
mA
mA
mA
mA
t_a(fp)
t_a(fr)
t_a(OTP)
PARAMETER
Paged Flash access time
Random Flash access time
OTP access time
MIN
MAX UNIT
37
ns
37
ns
60
ns
Table 6-68. Minimum Required Flash/OTP Wait-States at Different Frequencies
SYSCLKOUT (MHz)
SYSCLKOUT (ns)
150
6.67
120
8.33
100
10
75
13.33
50
20
30
33.33
25
40
15
66.67
4
250
(1) Page and random wait-state must be ≥ 1.
PAGE WAIT-STATE
5
4
3
2
1
1
1
1
1
RANDOM WAIT-
STATE ⁽¹⁾
5
4
3
2
1
1
1
1
1
OTP WAIT-STATE
8
7
5
4
2
1
1
1
1
Equations to compute the Flash page wait-state and random wait-state in Table 6-68 are as follows:
éæ
êç
Flash Page Wait State = êç
t
a
(fp)
öù
÷ú
÷ -1ú round up to the next highest integer), or 1 whichever is larger
êêëççè
t
c
(SCO )
÷÷ø
ú
úû
éæ _t
öù
êç
Flash Random Wait State = êç
a (fr )
÷ú
÷ -1ú round up to the next highest integer), or 1 whichever is larger
êêëççè
t
c
(SCO )
÷÷ø
ú
úû
Equation to compute the OTP wait-state in Table 6-68 is as follows:
éæ _t
öù
OTP Wait State
êç
= êç
a
(OTP
)
÷
÷
ú
-1ú
round
up
to
the
next
highest
integer), or 1 whichever is larger
êêëççè
t
c
(SCO
)
÷÷ø
ú
úû
158 Electrical Specifications
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