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SM320F28335-EP_12 Datasheet, PDF (32/167 Pages) Texas Instruments – Digital Signal Controller (DSC) | |||
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SM320F28335-EP
SPRS581D â JUNE 2009 â REVISED MAY 2012
www.ti.com
3.1 Memory Maps
In Figure 3-2 the following applies:
⢠Memory blocks are not to scale.
⢠Peripheral Frame 0, Peripheral Frame 1, Peripheral Frame 2, and Peripheral Frame 3 memory maps
are restricted to data memory only. A user program cannot access these memory maps in program
space.
⢠Protected means the order of "Write followed by Read" operations is preserved rather than the pipeline
order.
⢠Certain memory ranges are EALLOW protected against spurious writes after configuration.
⢠Locations 0x38 0080 - 0x38 008F contain the ADC calibration routine. It is not programmable by the
user.
⢠If the eCAN module is not used in an application, the RAM available (LAM, MOTS, MOTO, and
mailbox RAM) can be used as general-purpose RAM. The CAN module clock should be enabled for
this.
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Functional Overview
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