SM320F28335-EP_12 Datasheet, PDF (128/167 Pages) Texas Instruments – Digital Signal Controller (DSC)

SM320F28335-EP
SPRS581D – JUNE 2009 – REVISED MAY 2012
NO.
13
14
15
16
t_w(SPCH)S
t_w(SPCL)S
t_w(SPCL)S
t_w(SPCH)S
t_{d(SPCH-SOMI)S}
t_{d(SPCL-SOMI)S}
t_{v(SPCL-SOMI)S}
t_{v(SPCH-SOMI)S}
19
t_{su(SIMO-SPCL)S}
t_{su(SIMO-SPCH)S}
20
t_{v(SPCL-SIMO)S}
t_{v(SPCH-SIMO)S}
Table 6-33. SPI Slave Mode External Timing (Clock Phase = 0)^{(1) (2) (3) (4) (5)} (continued)
Pulse duration, SPICLK high (clock polarity = 0)
Pulse duration, SPICLK low (clock polarity = 1)
Pulse duration, SPICLK low (clock polarity = 0)
Pulse duration, SPICLK high (clock polarity = 1)
Delay time, SPICLK high to SPISOMI valid (clock polarity = 0)
Delay time, SPICLK low to SPISOMI valid (clock polarity = 1)
Valid time, SPISOMI data valid after SPICLK low
(clock polarity = 0)
Valid time, SPISOMI data valid after SPICLK high
(clock polarity = 1)
Setup time, SPISIMO before SPICLK low (clock polarity = 0)
Setup time, SPISIMO before SPICLK high (clock polarity = 1)
Valid time, SPISIMO data valid after SPICLK low
(clock polarity = 0)
Valid time, SPISIMO data valid after SPICLK high
(clock polarity = 1)
MIN
0.5t_c(SPC)S - 10
0.5t_c(SPC)S - 10
0.5t_c(SPC)S - 10
0.5t_c(SPC)S - 10
0.75t_c(SPC)S
0.75t_c(SPC)S
35
35
0.5t_c(SPC)S-10
0.5t_c(SPC)S-10
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MAX
0.5t_c(SPC)S
0.5t_c(SPC)S
0.5t_c(SPC)S
0.5t_c(SPC)S
35
35
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
128 Electrical Specifications
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